Online Linux Driver Verification Service (alpha)

Start Verification Verification History Rules

Rule violation

Driver: test-0032-net-wireless-ath-carl9170-unsafe.tar.bz2
Kernel: linux-2.6.37
Verification architecture: x86_64
Rule: Mutex lock/unlock

Error trace

-entry_point();

{

-__BLAST_initialize_/home/ldv/ldv-new/ldv-tools-inst/tmp/run/work/current--X--test-0032-net-wireless-ath-carl9170-unsafe.tar.bz2_1--X--defaultlinux-2.6.37--X--32_7/linux-2.6.37/csd_deg_dscv/2/dscv_tempdir/dscv/rcv/32_7/main-ldv_main0_sequence_infinite_withcheck_stateful/preprocess/1-cpp/drivers-test-0032-net-wireless-ath-carl9170-unsafe-carl9170-main.c.common.i();

{

416 -ar9170_qmap[ 0 ] = 2;
ar9170_qmap[ 1 ] = 1;
ar9170_qmap[ 2 ] = 0;
ar9170_qmap[ 3 ] = 3;
hw_rx_tally_regs[ 0 ].reg = 1848996;
hw_rx_tally_regs[ 0 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 0 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 0 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 0 ].nreg[ 3 ] = 67;
hw_rx_tally_regs[ 0 ].nreg[ 4 ] = 82;
hw_rx_tally_regs[ 0 ].nreg[ 5 ] = 67;
hw_rx_tally_regs[ 0 ].nreg[ 6 ] = 51;
hw_rx_tally_regs[ 0 ].nreg[ 7 ] = 50;
hw_rx_tally_regs[ 0 ].nreg[ 8 ] = 0;
hw_rx_tally_regs[ 1 ].reg = 1849000;
hw_rx_tally_regs[ 1 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 1 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 1 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 1 ].nreg[ 3 ] = 67;
hw_rx_tally_regs[ 1 ].nreg[ 4 ] = 82;
hw_rx_tally_regs[ 1 ].nreg[ 5 ] = 67;
hw_rx_tally_regs[ 1 ].nreg[ 6 ] = 49;
hw_rx_tally_regs[ 1 ].nreg[ 7 ] = 54;
hw_rx_tally_regs[ 1 ].nreg[ 8 ] = 0;
hw_rx_tally_regs[ 2 ].reg = 1848988;
hw_rx_tally_regs[ 2 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 2 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 2 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 2 ].nreg[ 3 ] = 84;
hw_rx_tally_regs[ 2 ].nreg[ 4 ] = 73;
hw_rx_tally_regs[ 2 ].nreg[ 5 ] = 77;
hw_rx_tally_regs[ 2 ].nreg[ 6 ] = 69;
hw_rx_tally_regs[ 2 ].nreg[ 7 ] = 79;
hw_rx_tally_regs[ 2 ].nreg[ 8 ] = 85;
hw_rx_tally_regs[ 2 ].nreg[ 9 ] = 84;
hw_rx_tally_regs[ 2 ].nreg[ 10 ] = 95;
hw_rx_tally_regs[ 2 ].nreg[ 11 ] = 67;
hw_rx_tally_regs[ 2 ].nreg[ 12 ] = 79;
hw_rx_tally_regs[ 2 ].nreg[ 13 ] = 85;
hw_rx_tally_regs[ 2 ].nreg[ 14 ] = 78;
hw_rx_tally_regs[ 2 ].nreg[ 15 ] = 84;
hw_rx_tally_regs[ 2 ].nreg[ 16 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 17 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 18 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 19 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 20 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 21 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 22 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 23 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 24 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 25 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 26 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 27 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 28 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 29 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 30 ] = 0;
hw_rx_tally_regs[ 2 ].nreg[ 31 ] = 0;
hw_rx_tally_regs[ 3 ].reg = 1849004;
hw_rx_tally_regs[ 3 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 3 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 3 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 3 ].nreg[ 3 ] = 69;
hw_rx_tally_regs[ 3 ].nreg[ 4 ] = 82;
hw_rx_tally_regs[ 3 ].nreg[ 5 ] = 82;
hw_rx_tally_regs[ 3 ].nreg[ 6 ] = 95;
hw_rx_tally_regs[ 3 ].nreg[ 7 ] = 68;
hw_rx_tally_regs[ 3 ].nreg[ 8 ] = 69;
hw_rx_tally_regs[ 3 ].nreg[ 9 ] = 67;
hw_rx_tally_regs[ 3 ].nreg[ 10 ] = 82;
hw_rx_tally_regs[ 3 ].nreg[ 11 ] = 89;
hw_rx_tally_regs[ 3 ].nreg[ 12 ] = 80;
hw_rx_tally_regs[ 3 ].nreg[ 13 ] = 84;
hw_rx_tally_regs[ 3 ].nreg[ 14 ] = 73;
hw_rx_tally_regs[ 3 ].nreg[ 15 ] = 79;
hw_rx_tally_regs[ 3 ].nreg[ 16 ] = 78;
hw_rx_tally_regs[ 3 ].nreg[ 17 ] = 95;
hw_rx_tally_regs[ 3 ].nreg[ 18 ] = 85;
hw_rx_tally_regs[ 3 ].nreg[ 19 ] = 78;
hw_rx_tally_regs[ 3 ].nreg[ 20 ] = 73;
hw_rx_tally_regs[ 3 ].nreg[ 21 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 22 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 23 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 24 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 25 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 26 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 27 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 28 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 29 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 30 ] = 0;
hw_rx_tally_regs[ 3 ].nreg[ 31 ] = 0;
hw_rx_tally_regs[ 4 ].reg = 1849020;
hw_rx_tally_regs[ 4 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 4 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 4 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 4 ].nreg[ 3 ] = 69;
hw_rx_tally_regs[ 4 ].nreg[ 4 ] = 82;
hw_rx_tally_regs[ 4 ].nreg[ 5 ] = 82;
hw_rx_tally_regs[ 4 ].nreg[ 6 ] = 95;
hw_rx_tally_regs[ 4 ].nreg[ 7 ] = 68;
hw_rx_tally_regs[ 4 ].nreg[ 8 ] = 69;
hw_rx_tally_regs[ 4 ].nreg[ 9 ] = 67;
hw_rx_tally_regs[ 4 ].nreg[ 10 ] = 82;
hw_rx_tally_regs[ 4 ].nreg[ 11 ] = 89;
hw_rx_tally_regs[ 4 ].nreg[ 12 ] = 80;
hw_rx_tally_regs[ 4 ].nreg[ 13 ] = 84;
hw_rx_tally_regs[ 4 ].nreg[ 14 ] = 73;
hw_rx_tally_regs[ 4 ].nreg[ 15 ] = 79;
hw_rx_tally_regs[ 4 ].nreg[ 16 ] = 78;
hw_rx_tally_regs[ 4 ].nreg[ 17 ] = 95;
hw_rx_tally_regs[ 4 ].nreg[ 18 ] = 77;
hw_rx_tally_regs[ 4 ].nreg[ 19 ] = 85;
hw_rx_tally_regs[ 4 ].nreg[ 20 ] = 76;
hw_rx_tally_regs[ 4 ].nreg[ 21 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 22 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 23 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 24 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 25 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 26 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 27 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 28 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 29 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 30 ] = 0;
hw_rx_tally_regs[ 4 ].nreg[ 31 ] = 0;
hw_rx_tally_regs[ 5 ].reg = 1850528;
hw_rx_tally_regs[ 5 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 5 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 5 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 5 ].nreg[ 3 ] = 77;
hw_rx_tally_regs[ 5 ].nreg[ 4 ] = 80;
hw_rx_tally_regs[ 5 ].nreg[ 5 ] = 68;
hw_rx_tally_regs[ 5 ].nreg[ 6 ] = 85;
hw_rx_tally_regs[ 5 ].nreg[ 7 ] = 0;
hw_rx_tally_regs[ 6 ].reg = 1850532;
hw_rx_tally_regs[ 6 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 6 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 6 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 6 ].nreg[ 3 ] = 68;
hw_rx_tally_regs[ 6 ].nreg[ 4 ] = 82;
hw_rx_tally_regs[ 6 ].nreg[ 5 ] = 79;
hw_rx_tally_regs[ 6 ].nreg[ 6 ] = 80;
hw_rx_tally_regs[ 6 ].nreg[ 7 ] = 80;
hw_rx_tally_regs[ 6 ].nreg[ 8 ] = 69;
hw_rx_tally_regs[ 6 ].nreg[ 9 ] = 68;
hw_rx_tally_regs[ 6 ].nreg[ 10 ] = 95;
hw_rx_tally_regs[ 6 ].nreg[ 11 ] = 77;
hw_rx_tally_regs[ 6 ].nreg[ 12 ] = 80;
hw_rx_tally_regs[ 6 ].nreg[ 13 ] = 68;
hw_rx_tally_regs[ 6 ].nreg[ 14 ] = 85;
hw_rx_tally_regs[ 6 ].nreg[ 15 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 16 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 17 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 18 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 19 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 20 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 21 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 22 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 23 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 24 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 25 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 26 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 27 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 28 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 29 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 30 ] = 0;
hw_rx_tally_regs[ 6 ].nreg[ 31 ] = 0;
hw_rx_tally_regs[ 7 ].reg = 1850536;
hw_rx_tally_regs[ 7 ].nreg[ 0 ] = 82;
hw_rx_tally_regs[ 7 ].nreg[ 1 ] = 88;
hw_rx_tally_regs[ 7 ].nreg[ 2 ] = 95;
hw_rx_tally_regs[ 7 ].nreg[ 3 ] = 68;
hw_rx_tally_regs[ 7 ].nreg[ 4 ] = 69;
hw_rx_tally_regs[ 7 ].nreg[ 5 ] = 76;
hw_rx_tally_regs[ 7 ].nreg[ 6 ] = 95;
hw_rx_tally_regs[ 7 ].nreg[ 7 ] = 77;
hw_rx_tally_regs[ 7 ].nreg[ 8 ] = 80;
hw_rx_tally_regs[ 7 ].nreg[ 9 ] = 68;
hw_rx_tally_regs[ 7 ].nreg[ 10 ] = 85;
hw_rx_tally_regs[ 7 ].nreg[ 11 ] = 0;
hw_phy_errors_regs[ 0 ].reg = 1850540;
hw_phy_errors_regs[ 0 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 0 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 0 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 0 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 0 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 0 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 0 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 0 ].nreg[ 7 ] = 77;
hw_phy_errors_regs[ 0 ].nreg[ 8 ] = 73;
hw_phy_errors_regs[ 0 ].nreg[ 9 ] = 83;
hw_phy_errors_regs[ 0 ].nreg[ 10 ] = 67;
hw_phy_errors_regs[ 0 ].nreg[ 11 ] = 95;
hw_phy_errors_regs[ 0 ].nreg[ 12 ] = 69;
hw_phy_errors_regs[ 0 ].nreg[ 13 ] = 82;
hw_phy_errors_regs[ 0 ].nreg[ 14 ] = 82;
hw_phy_errors_regs[ 0 ].nreg[ 15 ] = 79;
hw_phy_errors_regs[ 0 ].nreg[ 16 ] = 82;
hw_phy_errors_regs[ 0 ].nreg[ 17 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 18 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 19 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 20 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 21 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 22 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 23 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 24 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 25 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 26 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 27 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 28 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 29 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 30 ] = 0;
hw_phy_errors_regs[ 0 ].nreg[ 31 ] = 0;
hw_phy_errors_regs[ 1 ].reg = 1850544;
hw_phy_errors_regs[ 1 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 1 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 1 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 1 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 1 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 1 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 1 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 1 ].nreg[ 7 ] = 88;
hw_phy_errors_regs[ 1 ].nreg[ 8 ] = 82;
hw_phy_errors_regs[ 1 ].nreg[ 9 ] = 95;
hw_phy_errors_regs[ 1 ].nreg[ 10 ] = 69;
hw_phy_errors_regs[ 1 ].nreg[ 11 ] = 82;
hw_phy_errors_regs[ 1 ].nreg[ 12 ] = 82;
hw_phy_errors_regs[ 1 ].nreg[ 13 ] = 79;
hw_phy_errors_regs[ 1 ].nreg[ 14 ] = 82;
hw_phy_errors_regs[ 1 ].nreg[ 15 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 16 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 17 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 18 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 19 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 20 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 21 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 22 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 23 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 24 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 25 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 26 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 27 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 28 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 29 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 30 ] = 0;
hw_phy_errors_regs[ 1 ].nreg[ 31 ] = 0;
hw_phy_errors_regs[ 2 ].reg = 1850548;
hw_phy_errors_regs[ 2 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 2 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 2 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 2 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 2 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 2 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 2 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 2 ].nreg[ 7 ] = 79;
hw_phy_errors_regs[ 2 ].nreg[ 8 ] = 70;
hw_phy_errors_regs[ 2 ].nreg[ 9 ] = 68;
hw_phy_errors_regs[ 2 ].nreg[ 10 ] = 77;
hw_phy_errors_regs[ 2 ].nreg[ 11 ] = 95;
hw_phy_errors_regs[ 2 ].nreg[ 12 ] = 69;
hw_phy_errors_regs[ 2 ].nreg[ 13 ] = 82;
hw_phy_errors_regs[ 2 ].nreg[ 14 ] = 82;
hw_phy_errors_regs[ 2 ].nreg[ 15 ] = 79;
hw_phy_errors_regs[ 2 ].nreg[ 16 ] = 82;
hw_phy_errors_regs[ 2 ].nreg[ 17 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 18 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 19 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 20 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 21 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 22 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 23 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 24 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 25 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 26 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 27 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 28 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 29 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 30 ] = 0;
hw_phy_errors_regs[ 2 ].nreg[ 31 ] = 0;
hw_phy_errors_regs[ 3 ].reg = 1850552;
hw_phy_errors_regs[ 3 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 3 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 3 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 3 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 3 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 3 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 3 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 3 ].nreg[ 7 ] = 67;
hw_phy_errors_regs[ 3 ].nreg[ 8 ] = 67;
hw_phy_errors_regs[ 3 ].nreg[ 9 ] = 75;
hw_phy_errors_regs[ 3 ].nreg[ 10 ] = 95;
hw_phy_errors_regs[ 3 ].nreg[ 11 ] = 69;
hw_phy_errors_regs[ 3 ].nreg[ 12 ] = 82;
hw_phy_errors_regs[ 3 ].nreg[ 13 ] = 82;
hw_phy_errors_regs[ 3 ].nreg[ 14 ] = 79;
hw_phy_errors_regs[ 3 ].nreg[ 15 ] = 82;
hw_phy_errors_regs[ 3 ].nreg[ 16 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 17 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 18 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 19 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 20 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 21 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 22 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 23 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 24 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 25 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 26 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 27 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 28 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 29 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 30 ] = 0;
hw_phy_errors_regs[ 3 ].nreg[ 31 ] = 0;
hw_phy_errors_regs[ 4 ].reg = 1850556;
hw_phy_errors_regs[ 4 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 4 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 4 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 4 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 4 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 4 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 4 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 4 ].nreg[ 7 ] = 72;
hw_phy_errors_regs[ 4 ].nreg[ 8 ] = 84;
hw_phy_errors_regs[ 4 ].nreg[ 9 ] = 95;
hw_phy_errors_regs[ 4 ].nreg[ 10 ] = 69;
hw_phy_errors_regs[ 4 ].nreg[ 11 ] = 82;
hw_phy_errors_regs[ 4 ].nreg[ 12 ] = 82;
hw_phy_errors_regs[ 4 ].nreg[ 13 ] = 79;
hw_phy_errors_regs[ 4 ].nreg[ 14 ] = 82;
hw_phy_errors_regs[ 4 ].nreg[ 15 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 16 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 17 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 18 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 19 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 20 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 21 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 22 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 23 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 24 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 25 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 26 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 27 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 28 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 29 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 30 ] = 0;
hw_phy_errors_regs[ 4 ].nreg[ 31 ] = 0;
hw_phy_errors_regs[ 5 ].reg = 1850560;
hw_phy_errors_regs[ 5 ].nreg[ 0 ] = 82;
hw_phy_errors_regs[ 5 ].nreg[ 1 ] = 88;
hw_phy_errors_regs[ 5 ].nreg[ 2 ] = 95;
hw_phy_errors_regs[ 5 ].nreg[ 3 ] = 80;
hw_phy_errors_regs[ 5 ].nreg[ 4 ] = 72;
hw_phy_errors_regs[ 5 ].nreg[ 5 ] = 89;
hw_phy_errors_regs[ 5 ].nreg[ 6 ] = 95;
hw_phy_errors_regs[ 5 ].nreg[ 7 ] = 84;
hw_phy_errors_regs[ 5 ].nreg[ 8 ] = 79;
hw_phy_errors_regs[ 5 ].nreg[ 9 ] = 84;
hw_phy_errors_regs[ 5 ].nreg[ 10 ] = 65;
hw_phy_errors_regs[ 5 ].nreg[ 11 ] = 76;
hw_phy_errors_regs[ 5 ].nreg[ 12 ] = 0;
hw_tx_tally_regs[ 0 ].reg = 1849076;
hw_tx_tally_regs[ 0 ].nreg[ 0 ] = 84;
hw_tx_tally_regs[ 0 ].nreg[ 1 ] = 88;
hw_tx_tally_regs[ 0 ].nreg[ 2 ] = 95;
hw_tx_tally_regs[ 0 ].nreg[ 3 ] = 84;
hw_tx_tally_regs[ 0 ].nreg[ 4 ] = 79;
hw_tx_tally_regs[ 0 ].nreg[ 5 ] = 84;
hw_tx_tally_regs[ 0 ].nreg[ 6 ] = 65;
hw_tx_tally_regs[ 0 ].nreg[ 7 ] = 76;
hw_tx_tally_regs[ 0 ].nreg[ 8 ] = 0;
hw_tx_tally_regs[ 1 ].reg = 1848968;
hw_tx_tally_regs[ 1 ].nreg[ 0 ] = 84;
hw_tx_tally_regs[ 1 ].nreg[ 1 ] = 88;
hw_tx_tally_regs[ 1 ].nreg[ 2 ] = 95;
hw_tx_tally_regs[ 1 ].nreg[ 3 ] = 85;
hw_tx_tally_regs[ 1 ].nreg[ 4 ] = 78;
hw_tx_tally_regs[ 1 ].nreg[ 5 ] = 68;
hw_tx_tally_regs[ 1 ].nreg[ 6 ] = 69;
hw_tx_tally_regs[ 1 ].nreg[ 7 ] = 82;
hw_tx_tally_regs[ 1 ].nreg[ 8 ] = 82;
hw_tx_tally_regs[ 1 ].nreg[ 9 ] = 85;
hw_tx_tally_regs[ 1 ].nreg[ 10 ] = 78;
hw_tx_tally_regs[ 1 ].nreg[ 11 ] = 0;
hw_tx_tally_regs[ 2 ].reg = 1849036;
hw_tx_tally_regs[ 2 ].nreg[ 0 ] = 84;
hw_tx_tally_regs[ 2 ].nreg[ 1 ] = 88;
hw_tx_tally_regs[ 2 ].nreg[ 2 ] = 95;
hw_tx_tally_regs[ 2 ].nreg[ 3 ] = 82;
hw_tx_tally_regs[ 2 ].nreg[ 4 ] = 69;
hw_tx_tally_regs[ 2 ].nreg[ 5 ] = 84;
hw_tx_tally_regs[ 2 ].nreg[ 6 ] = 82;
hw_tx_tally_regs[ 2 ].nreg[ 7 ] = 89;
hw_tx_tally_regs[ 2 ].nreg[ 8 ] = 0;
hw_wlan_queue_regs[ 0 ].reg = 1850684;
hw_wlan_queue_regs[ 0 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 0 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 0 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 0 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 0 ].nreg[ 4 ] = 83;
hw_wlan_queue_regs[ 0 ].nreg[ 5 ] = 84;
hw_wlan_queue_regs[ 0 ].nreg[ 6 ] = 65;
hw_wlan_queue_regs[ 0 ].nreg[ 7 ] = 84;
hw_wlan_queue_regs[ 0 ].nreg[ 8 ] = 85;
hw_wlan_queue_regs[ 0 ].nreg[ 9 ] = 83;
hw_wlan_queue_regs[ 0 ].nreg[ 10 ] = 0;
hw_wlan_queue_regs[ 1 ].reg = 1850672;
hw_wlan_queue_regs[ 1 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 1 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 1 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 1 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 1 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 1 ].nreg[ 5 ] = 82;
hw_wlan_queue_regs[ 1 ].nreg[ 6 ] = 73;
hw_wlan_queue_regs[ 1 ].nreg[ 7 ] = 71;
hw_wlan_queue_regs[ 1 ].nreg[ 8 ] = 71;
hw_wlan_queue_regs[ 1 ].nreg[ 9 ] = 69;
hw_wlan_queue_regs[ 1 ].nreg[ 10 ] = 82;
hw_wlan_queue_regs[ 1 ].nreg[ 11 ] = 0;
hw_wlan_queue_regs[ 2 ].reg = 1850624;
hw_wlan_queue_regs[ 2 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 2 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 2 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 2 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 2 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 2 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 2 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 2 ].nreg[ 7 ] = 48;
hw_wlan_queue_regs[ 2 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 2 ].nreg[ 9 ] = 65;
hw_wlan_queue_regs[ 2 ].nreg[ 10 ] = 68;
hw_wlan_queue_regs[ 2 ].nreg[ 11 ] = 68;
hw_wlan_queue_regs[ 2 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 2 ].nreg[ 13 ] = 0;
hw_wlan_queue_regs[ 3 ].reg = 1850628;
hw_wlan_queue_regs[ 3 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 3 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 3 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 3 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 3 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 3 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 3 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 3 ].nreg[ 7 ] = 48;
hw_wlan_queue_regs[ 3 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 3 ].nreg[ 9 ] = 67;
hw_wlan_queue_regs[ 3 ].nreg[ 10 ] = 85;
hw_wlan_queue_regs[ 3 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 3 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 3 ].nreg[ 13 ] = 95;
hw_wlan_queue_regs[ 3 ].nreg[ 14 ] = 65;
hw_wlan_queue_regs[ 3 ].nreg[ 15 ] = 68;
hw_wlan_queue_regs[ 3 ].nreg[ 16 ] = 68;
hw_wlan_queue_regs[ 3 ].nreg[ 17 ] = 82;
hw_wlan_queue_regs[ 3 ].nreg[ 18 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 19 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 20 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 21 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 22 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 23 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 24 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 25 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 26 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 27 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 28 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 29 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 30 ] = 0;
hw_wlan_queue_regs[ 3 ].nreg[ 31 ] = 0;
hw_wlan_queue_regs[ 4 ].reg = 1850632;
hw_wlan_queue_regs[ 4 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 4 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 4 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 4 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 4 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 4 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 4 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 4 ].nreg[ 7 ] = 49;
hw_wlan_queue_regs[ 4 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 4 ].nreg[ 9 ] = 65;
hw_wlan_queue_regs[ 4 ].nreg[ 10 ] = 68;
hw_wlan_queue_regs[ 4 ].nreg[ 11 ] = 68;
hw_wlan_queue_regs[ 4 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 4 ].nreg[ 13 ] = 0;
hw_wlan_queue_regs[ 5 ].reg = 1850636;
hw_wlan_queue_regs[ 5 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 5 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 5 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 5 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 5 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 5 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 5 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 5 ].nreg[ 7 ] = 49;
hw_wlan_queue_regs[ 5 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 5 ].nreg[ 9 ] = 67;
hw_wlan_queue_regs[ 5 ].nreg[ 10 ] = 85;
hw_wlan_queue_regs[ 5 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 5 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 5 ].nreg[ 13 ] = 95;
hw_wlan_queue_regs[ 5 ].nreg[ 14 ] = 65;
hw_wlan_queue_regs[ 5 ].nreg[ 15 ] = 68;
hw_wlan_queue_regs[ 5 ].nreg[ 16 ] = 68;
hw_wlan_queue_regs[ 5 ].nreg[ 17 ] = 82;
hw_wlan_queue_regs[ 5 ].nreg[ 18 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 19 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 20 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 21 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 22 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 23 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 24 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 25 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 26 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 27 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 28 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 29 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 30 ] = 0;
hw_wlan_queue_regs[ 5 ].nreg[ 31 ] = 0;
hw_wlan_queue_regs[ 6 ].reg = 1850640;
hw_wlan_queue_regs[ 6 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 6 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 6 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 6 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 6 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 6 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 6 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 6 ].nreg[ 7 ] = 50;
hw_wlan_queue_regs[ 6 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 6 ].nreg[ 9 ] = 65;
hw_wlan_queue_regs[ 6 ].nreg[ 10 ] = 68;
hw_wlan_queue_regs[ 6 ].nreg[ 11 ] = 68;
hw_wlan_queue_regs[ 6 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 6 ].nreg[ 13 ] = 0;
hw_wlan_queue_regs[ 7 ].reg = 1850644;
hw_wlan_queue_regs[ 7 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 7 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 7 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 7 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 7 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 7 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 7 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 7 ].nreg[ 7 ] = 50;
hw_wlan_queue_regs[ 7 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 7 ].nreg[ 9 ] = 67;
hw_wlan_queue_regs[ 7 ].nreg[ 10 ] = 85;
hw_wlan_queue_regs[ 7 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 7 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 7 ].nreg[ 13 ] = 95;
hw_wlan_queue_regs[ 7 ].nreg[ 14 ] = 65;
hw_wlan_queue_regs[ 7 ].nreg[ 15 ] = 68;
hw_wlan_queue_regs[ 7 ].nreg[ 16 ] = 68;
hw_wlan_queue_regs[ 7 ].nreg[ 17 ] = 82;
hw_wlan_queue_regs[ 7 ].nreg[ 18 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 19 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 20 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 21 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 22 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 23 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 24 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 25 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 26 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 27 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 28 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 29 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 30 ] = 0;
hw_wlan_queue_regs[ 7 ].nreg[ 31 ] = 0;
hw_wlan_queue_regs[ 8 ].reg = 1850648;
hw_wlan_queue_regs[ 8 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 8 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 8 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 8 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 8 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 8 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 8 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 8 ].nreg[ 7 ] = 51;
hw_wlan_queue_regs[ 8 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 8 ].nreg[ 9 ] = 65;
hw_wlan_queue_regs[ 8 ].nreg[ 10 ] = 68;
hw_wlan_queue_regs[ 8 ].nreg[ 11 ] = 68;
hw_wlan_queue_regs[ 8 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 8 ].nreg[ 13 ] = 0;
hw_wlan_queue_regs[ 9 ].reg = 1850652;
hw_wlan_queue_regs[ 9 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 9 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 9 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 9 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 9 ].nreg[ 4 ] = 84;
hw_wlan_queue_regs[ 9 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 9 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 9 ].nreg[ 7 ] = 51;
hw_wlan_queue_regs[ 9 ].nreg[ 8 ] = 95;
hw_wlan_queue_regs[ 9 ].nreg[ 9 ] = 67;
hw_wlan_queue_regs[ 9 ].nreg[ 10 ] = 85;
hw_wlan_queue_regs[ 9 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 9 ].nreg[ 12 ] = 82;
hw_wlan_queue_regs[ 9 ].nreg[ 13 ] = 95;
hw_wlan_queue_regs[ 9 ].nreg[ 14 ] = 65;
hw_wlan_queue_regs[ 9 ].nreg[ 15 ] = 68;
hw_wlan_queue_regs[ 9 ].nreg[ 16 ] = 68;
hw_wlan_queue_regs[ 9 ].nreg[ 17 ] = 82;
hw_wlan_queue_regs[ 9 ].nreg[ 18 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 19 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 20 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 21 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 22 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 23 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 24 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 25 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 26 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 27 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 28 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 29 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 30 ] = 0;
hw_wlan_queue_regs[ 9 ].nreg[ 31 ] = 0;
hw_wlan_queue_regs[ 10 ].reg = 1850664;
hw_wlan_queue_regs[ 10 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 10 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 10 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 10 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 10 ].nreg[ 4 ] = 82;
hw_wlan_queue_regs[ 10 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 10 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 10 ].nreg[ 7 ] = 95;
hw_wlan_queue_regs[ 10 ].nreg[ 8 ] = 65;
hw_wlan_queue_regs[ 10 ].nreg[ 9 ] = 68;
hw_wlan_queue_regs[ 10 ].nreg[ 10 ] = 68;
hw_wlan_queue_regs[ 10 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 10 ].nreg[ 12 ] = 0;
hw_wlan_queue_regs[ 11 ].reg = 1850668;
hw_wlan_queue_regs[ 11 ].nreg[ 0 ] = 68;
hw_wlan_queue_regs[ 11 ].nreg[ 1 ] = 77;
hw_wlan_queue_regs[ 11 ].nreg[ 2 ] = 65;
hw_wlan_queue_regs[ 11 ].nreg[ 3 ] = 95;
hw_wlan_queue_regs[ 11 ].nreg[ 4 ] = 82;
hw_wlan_queue_regs[ 11 ].nreg[ 5 ] = 88;
hw_wlan_queue_regs[ 11 ].nreg[ 6 ] = 81;
hw_wlan_queue_regs[ 11 ].nreg[ 7 ] = 95;
hw_wlan_queue_regs[ 11 ].nreg[ 8 ] = 67;
hw_wlan_queue_regs[ 11 ].nreg[ 9 ] = 85;
hw_wlan_queue_regs[ 11 ].nreg[ 10 ] = 82;
hw_wlan_queue_regs[ 11 ].nreg[ 11 ] = 82;
hw_wlan_queue_regs[ 11 ].nreg[ 12 ] = 95;
hw_wlan_queue_regs[ 11 ].nreg[ 13 ] = 65;
hw_wlan_queue_regs[ 11 ].nreg[ 14 ] = 68;
hw_wlan_queue_regs[ 11 ].nreg[ 15 ] = 68;
hw_wlan_queue_regs[ 11 ].nreg[ 16 ] = 82;
hw_wlan_queue_regs[ 11 ].nreg[ 17 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 18 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 19 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 20 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 21 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 22 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 23 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 24 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 25 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 26 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 27 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 28 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 29 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 30 ] = 0;
hw_wlan_queue_regs[ 11 ].nreg[ 31 ] = 0;
hw_ampdu_info_regs[ 0 ].reg = 1850272;
hw_ampdu_info_regs[ 0 ].nreg[ 0 ] = 65;
hw_ampdu_info_regs[ 0 ].nreg[ 1 ] = 77;
hw_ampdu_info_regs[ 0 ].nreg[ 2 ] = 80;
hw_ampdu_info_regs[ 0 ].nreg[ 3 ] = 68;
hw_ampdu_info_regs[ 0 ].nreg[ 4 ] = 85;
hw_ampdu_info_regs[ 0 ].nreg[ 5 ] = 95;
hw_ampdu_info_regs[ 0 ].nreg[ 6 ] = 68;
hw_ampdu_info_regs[ 0 ].nreg[ 7 ] = 69;
hw_ampdu_info_regs[ 0 ].nreg[ 8 ] = 78;
hw_ampdu_info_regs[ 0 ].nreg[ 9 ] = 83;
hw_ampdu_info_regs[ 0 ].nreg[ 10 ] = 73;
hw_ampdu_info_regs[ 0 ].nreg[ 11 ] = 84;
hw_ampdu_info_regs[ 0 ].nreg[ 12 ] = 89;
hw_ampdu_info_regs[ 0 ].nreg[ 13 ] = 0;
hw_ampdu_info_regs[ 1 ].reg = 1850268;
hw_ampdu_info_regs[ 1 ].nreg[ 0 ] = 65;
hw_ampdu_info_regs[ 1 ].nreg[ 1 ] = 77;
hw_ampdu_info_regs[ 1 ].nreg[ 2 ] = 80;
hw_ampdu_info_regs[ 1 ].nreg[ 3 ] = 68;
hw_ampdu_info_regs[ 1 ].nreg[ 4 ] = 85;
hw_ampdu_info_regs[ 1 ].nreg[ 5 ] = 95;
hw_ampdu_info_regs[ 1 ].nreg[ 6 ] = 70;
hw_ampdu_info_regs[ 1 ].nreg[ 7 ] = 65;
hw_ampdu_info_regs[ 1 ].nreg[ 8 ] = 67;
hw_ampdu_info_regs[ 1 ].nreg[ 9 ] = 84;
hw_ampdu_info_regs[ 1 ].nreg[ 10 ] = 79;
hw_ampdu_info_regs[ 1 ].nreg[ 11 ] = 82;
hw_ampdu_info_regs[ 1 ].nreg[ 12 ] = 0;
hw_pta_queue_regs[ 0 ].reg = 1974588;
hw_pta_queue_regs[ 0 ].nreg[ 0 ] = 68;
hw_pta_queue_regs[ 0 ].nreg[ 1 ] = 78;
hw_pta_queue_regs[ 0 ].nreg[ 2 ] = 95;
hw_pta_queue_regs[ 0 ].nreg[ 3 ] = 67;
hw_pta_queue_regs[ 0 ].nreg[ 4 ] = 85;
hw_pta_queue_regs[ 0 ].nreg[ 5 ] = 82;
hw_pta_queue_regs[ 0 ].nreg[ 6 ] = 82;
hw_pta_queue_regs[ 0 ].nreg[ 7 ] = 95;
hw_pta_queue_regs[ 0 ].nreg[ 8 ] = 65;
hw_pta_queue_regs[ 0 ].nreg[ 9 ] = 68;
hw_pta_queue_regs[ 0 ].nreg[ 10 ] = 68;
hw_pta_queue_regs[ 0 ].nreg[ 11 ] = 82;
hw_pta_queue_regs[ 0 ].nreg[ 12 ] = 72;
hw_pta_queue_regs[ 0 ].nreg[ 13 ] = 0;
hw_pta_queue_regs[ 1 ].reg = 1974584;
hw_pta_queue_regs[ 1 ].nreg[ 0 ] = 68;
hw_pta_queue_regs[ 1 ].nreg[ 1 ] = 78;
hw_pta_queue_regs[ 1 ].nreg[ 2 ] = 95;
hw_pta_queue_regs[ 1 ].nreg[ 3 ] = 67;
hw_pta_queue_regs[ 1 ].nreg[ 4 ] = 85;
hw_pta_queue_regs[ 1 ].nreg[ 5 ] = 82;
hw_pta_queue_regs[ 1 ].nreg[ 6 ] = 82;
hw_pta_queue_regs[ 1 ].nreg[ 7 ] = 95;
hw_pta_queue_regs[ 1 ].nreg[ 8 ] = 65;
hw_pta_queue_regs[ 1 ].nreg[ 9 ] = 68;
hw_pta_queue_regs[ 1 ].nreg[ 10 ] = 68;
hw_pta_queue_regs[ 1 ].nreg[ 11 ] = 82;
hw_pta_queue_regs[ 1 ].nreg[ 12 ] = 76;
hw_pta_queue_regs[ 1 ].nreg[ 13 ] = 0;
hw_pta_queue_regs[ 2 ].reg = 1974596;
hw_pta_queue_regs[ 2 ].nreg[ 0 ] = 85;
hw_pta_queue_regs[ 2 ].nreg[ 1 ] = 80;
hw_pta_queue_regs[ 2 ].nreg[ 2 ] = 95;
hw_pta_queue_regs[ 2 ].nreg[ 3 ] = 67;
hw_pta_queue_regs[ 2 ].nreg[ 4 ] = 85;
hw_pta_queue_regs[ 2 ].nreg[ 5 ] = 82;
hw_pta_queue_regs[ 2 ].nreg[ 6 ] = 82;
hw_pta_queue_regs[ 2 ].nreg[ 7 ] = 95;
hw_pta_queue_regs[ 2 ].nreg[ 8 ] = 65;
hw_pta_queue_regs[ 2 ].nreg[ 9 ] = 68;
hw_pta_queue_regs[ 2 ].nreg[ 10 ] = 68;
hw_pta_queue_regs[ 2 ].nreg[ 11 ] = 82;
hw_pta_queue_regs[ 2 ].nreg[ 12 ] = 72;
hw_pta_queue_regs[ 2 ].nreg[ 13 ] = 0;
hw_pta_queue_regs[ 3 ].reg = 1974592;
hw_pta_queue_regs[ 3 ].nreg[ 0 ] = 85;
hw_pta_queue_regs[ 3 ].nreg[ 1 ] = 80;
hw_pta_queue_regs[ 3 ].nreg[ 2 ] = 95;
hw_pta_queue_regs[ 3 ].nreg[ 3 ] = 67;
hw_pta_queue_regs[ 3 ].nreg[ 4 ] = 85;
hw_pta_queue_regs[ 3 ].nreg[ 5 ] = 82;
hw_pta_queue_regs[ 3 ].nreg[ 6 ] = 82;
hw_pta_queue_regs[ 3 ].nreg[ 7 ] = 95;
hw_pta_queue_regs[ 3 ].nreg[ 8 ] = 65;
hw_pta_queue_regs[ 3 ].nreg[ 9 ] = 68;
hw_pta_queue_regs[ 3 ].nreg[ 10 ] = 68;
hw_pta_queue_regs[ 3 ].nreg[ 11 ] = 82;
hw_pta_queue_regs[ 3 ].nreg[ 12 ] = 76;
hw_pta_queue_regs[ 3 ].nreg[ 13 ] = 0;
hw_pta_queue_regs[ 4 ].reg = 1974580;
hw_pta_queue_regs[ 4 ].nreg[ 0 ] = 68;
hw_pta_queue_regs[ 4 ].nreg[ 1 ] = 77;
hw_pta_queue_regs[ 4 ].nreg[ 2 ] = 65;
hw_pta_queue_regs[ 4 ].nreg[ 3 ] = 95;
hw_pta_queue_regs[ 4 ].nreg[ 4 ] = 83;
hw_pta_queue_regs[ 4 ].nreg[ 5 ] = 84;
hw_pta_queue_regs[ 4 ].nreg[ 6 ] = 65;
hw_pta_queue_regs[ 4 ].nreg[ 7 ] = 84;
hw_pta_queue_regs[ 4 ].nreg[ 8 ] = 85;
hw_pta_queue_regs[ 4 ].nreg[ 9 ] = 83;
hw_pta_queue_regs[ 4 ].nreg[ 10 ] = 0;
hw_pta_queue_regs[ 5 ].reg = 1974600;
hw_pta_queue_regs[ 5 ].nreg[ 0 ] = 68;
hw_pta_queue_regs[ 5 ].nreg[ 1 ] = 77;
hw_pta_queue_regs[ 5 ].nreg[ 2 ] = 65;
hw_pta_queue_regs[ 5 ].nreg[ 3 ] = 95;
hw_pta_queue_regs[ 5 ].nreg[ 4 ] = 77;
hw_pta_queue_regs[ 5 ].nreg[ 5 ] = 79;
hw_pta_queue_regs[ 5 ].nreg[ 6 ] = 68;
hw_pta_queue_regs[ 5 ].nreg[ 7 ] = 69;
hw_pta_queue_regs[ 5 ].nreg[ 8 ] = 95;
hw_pta_queue_regs[ 5 ].nreg[ 9 ] = 67;
hw_pta_queue_regs[ 5 ].nreg[ 10 ] = 84;
hw_pta_queue_regs[ 5 ].nreg[ 11 ] = 82;
hw_pta_queue_regs[ 5 ].nreg[ 12 ] = 76;
hw_pta_queue_regs[ 5 ].nreg[ 13 ] = 0;
__param_str_nohwcrypt[ 0 ] = 110;
__param_str_nohwcrypt[ 1 ] = 111;
__param_str_nohwcrypt[ 2 ] = 104;
__param_str_nohwcrypt[ 3 ] = 119;
__param_str_nohwcrypt[ 4 ] = 99;
__param_str_nohwcrypt[ 5 ] = 114;
__param_str_nohwcrypt[ 6 ] = 121;
__param_str_nohwcrypt[ 7 ] = 112;
__param_str_nohwcrypt[ 8 ] = 116;
__param_str_nohwcrypt[ 9 ] = 0;
__param_nohwcrypt.name = __param_str_nohwcrypt;
__param_nohwcrypt.ops = &(param_ops_bool);
__param_nohwcrypt.perm = 292;
__param_nohwcrypt.flags = 0;
__param_nohwcrypt.__annonCompField19.arg = &(modparam_nohwcrypt);
__mod_nohwcrypttype53[ 0 ] = 112;
__mod_nohwcrypttype53[ 1 ] = 97;
__mod_nohwcrypttype53[ 2 ] = 114;
__mod_nohwcrypttype53[ 3 ] = 109;
__mod_nohwcrypttype53[ 4 ] = 116;
__mod_nohwcrypttype53[ 5 ] = 121;
__mod_nohwcrypttype53[ 6 ] = 112;
__mod_nohwcrypttype53[ 7 ] = 101;
__mod_nohwcrypttype53[ 8 ] = 61;
__mod_nohwcrypttype53[ 9 ] = 110;
__mod_nohwcrypttype53[ 10 ] = 111;
__mod_nohwcrypttype53[ 11 ] = 104;
__mod_nohwcrypttype53[ 12 ] = 119;
__mod_nohwcrypttype53[ 13 ] = 99;
__mod_nohwcrypttype53[ 14 ] = 114;
__mod_nohwcrypttype53[ 15 ] = 121;
__mod_nohwcrypttype53[ 16 ] = 112;
__mod_nohwcrypttype53[ 17 ] = 116;
__mod_nohwcrypttype53[ 18 ] = 58;
__mod_nohwcrypttype53[ 19 ] = 98;
__mod_nohwcrypttype53[ 20 ] = 111;
__mod_nohwcrypttype53[ 21 ] = 111;
__mod_nohwcrypttype53[ 22 ] = 108;
__mod_nohwcrypttype53[ 23 ] = 0;
__mod_nohwcrypt54[ 0 ] = 112;
__mod_nohwcrypt54[ 1 ] = 97;
__mod_nohwcrypt54[ 2 ] = 114;
__mod_nohwcrypt54[ 3 ] = 109;
__mod_nohwcrypt54[ 4 ] = 61;
__mod_nohwcrypt54[ 5 ] = 110;
__mod_nohwcrypt54[ 6 ] = 111;
__mod_nohwcrypt54[ 7 ] = 104;
__mod_nohwcrypt54[ 8 ] = 119;
__mod_nohwcrypt54[ 9 ] = 99;
__mod_nohwcrypt54[ 10 ] = 114;
__mod_nohwcrypt54[ 11 ] = 121;
__mod_nohwcrypt54[ 12 ] = 112;
__mod_nohwcrypt54[ 13 ] = 116;
__mod_nohwcrypt54[ 14 ] = 58;
__mod_nohwcrypt54[ 15 ] = 68;
__mod_nohwcrypt54[ 16 ] = 105;
__mod_nohwcrypt54[ 17 ] = 115;
__mod_nohwcrypt54[ 18 ] = 97;
__mod_nohwcrypt54[ 19 ] = 98;
__mod_nohwcrypt54[ 20 ] = 108;
__mod_nohwcrypt54[ 21 ] = 101;
__mod_nohwcrypt54[ 22 ] = 32;
__mod_nohwcrypt54[ 23 ] = 104;
__mod_nohwcrypt54[ 24 ] = 97;
__mod_nohwcrypt54[ 25 ] = 114;
__mod_nohwcrypt54[ 26 ] = 100;
__mod_nohwcrypt54[ 27 ] = 119;
__mod_nohwcrypt54[ 28 ] = 97;
__mod_nohwcrypt54[ 29 ] = 114;
__mod_nohwcrypt54[ 30 ] = 101;
__mod_nohwcrypt54[ 31 ] = 32;
__mod_nohwcrypt54[ 32 ] = 99;
__mod_nohwcrypt54[ 33 ] = 114;
__mod_nohwcrypt54[ 34 ] = 121;
__mod_nohwcrypt54[ 35 ] = 112;
__mod_nohwcrypt54[ 36 ] = 116;
__mod_nohwcrypt54[ 37 ] = 111;
__mod_nohwcrypt54[ 38 ] = 32;
__mod_nohwcrypt54[ 39 ] = 111;
__mod_nohwcrypt54[ 40 ] = 102;
__mod_nohwcrypt54[ 41 ] = 102;
__mod_nohwcrypt54[ 42 ] = 108;
__mod_nohwcrypt54[ 43 ] = 111;
__mod_nohwcrypt54[ 44 ] = 97;
__mod_nohwcrypt54[ 45 ] = 100;
__mod_nohwcrypt54[ 46 ] = 46;
__mod_nohwcrypt54[ 47 ] = 0;
__param_str_noht[ 0 ] = 110;
__param_str_noht[ 1 ] = 111;
__param_str_noht[ 2 ] = 104;
__param_str_noht[ 3 ] = 116;
__param_str_noht[ 4 ] = 0;
__param_noht.name = __param_str_noht;
__param_noht.ops = &(param_ops_int);
__param_noht.perm = 292;
__param_noht.flags = 0;
__param_noht.__annonCompField19.arg = &(modparam_noht);
__mod_nohttype57[ 0 ] = 112;
__mod_nohttype57[ 1 ] = 97;
__mod_nohttype57[ 2 ] = 114;
__mod_nohttype57[ 3 ] = 109;
__mod_nohttype57[ 4 ] = 116;
__mod_nohttype57[ 5 ] = 121;
__mod_nohttype57[ 6 ] = 112;
__mod_nohttype57[ 7 ] = 101;
__mod_nohttype57[ 8 ] = 61;
__mod_nohttype57[ 9 ] = 110;
__mod_nohttype57[ 10 ] = 111;
__mod_nohttype57[ 11 ] = 104;
__mod_nohttype57[ 12 ] = 116;
__mod_nohttype57[ 13 ] = 58;
__mod_nohttype57[ 14 ] = 105;
__mod_nohttype57[ 15 ] = 110;
__mod_nohttype57[ 16 ] = 116;
__mod_nohttype57[ 17 ] = 0;
__mod_noht58[ 0 ] = 112;
__mod_noht58[ 1 ] = 97;
__mod_noht58[ 2 ] = 114;
__mod_noht58[ 3 ] = 109;
__mod_noht58[ 4 ] = 61;
__mod_noht58[ 5 ] = 110;
__mod_noht58[ 6 ] = 111;
__mod_noht58[ 7 ] = 104;
__mod_noht58[ 8 ] = 116;
__mod_noht58[ 9 ] = 58;
__mod_noht58[ 10 ] = 68;
__mod_noht58[ 11 ] = 105;
__mod_noht58[ 12 ] = 115;
__mod_noht58[ 13 ] = 97;
__mod_noht58[ 14 ] = 98;
__mod_noht58[ 15 ] = 108;
__mod_noht58[ 16 ] = 101;
__mod_noht58[ 17 ] = 32;
__mod_noht58[ 18 ] = 77;
__mod_noht58[ 19 ] = 80;
__mod_noht58[ 20 ] = 68;
__mod_noht58[ 21 ] = 85;
__mod_noht58[ 22 ] = 32;
__mod_noht58[ 23 ] = 97;
__mod_noht58[ 24 ] = 103;
__mod_noht58[ 25 ] = 103;
__mod_noht58[ 26 ] = 114;
__mod_noht58[ 27 ] = 101;
__mod_noht58[ 28 ] = 103;
__mod_noht58[ 29 ] = 97;
__mod_noht58[ 30 ] = 116;
__mod_noht58[ 31 ] = 105;
__mod_noht58[ 32 ] = 111;
__mod_noht58[ 33 ] = 110;
__mod_noht58[ 34 ] = 46;
__mod_noht58[ 35 ] = 0;
__carl9170_ratetable[ 0 ].flags = 0;
__carl9170_ratetable[ 0 ].bitrate = 10;
__carl9170_ratetable[ 0 ].hw_value = 0;
__carl9170_ratetable[ 0 ].hw_value_short = 0;
__carl9170_ratetable[ 1 ].flags = 1;
__carl9170_ratetable[ 1 ].bitrate = 20;
__carl9170_ratetable[ 1 ].hw_value = 1 | 1 << 4;
__carl9170_ratetable[ 1 ].hw_value_short = 0;
__carl9170_ratetable[ 2 ].flags = 1;
__carl9170_ratetable[ 2 ].bitrate = 55;
__carl9170_ratetable[ 2 ].hw_value = 2 | 2 << 4;
__carl9170_ratetable[ 2 ].hw_value_short = 0;
__carl9170_ratetable[ 3 ].flags = 1;
__carl9170_ratetable[ 3 ].bitrate = 110;
__carl9170_ratetable[ 3 ].hw_value = 3 | 3 << 4;
__carl9170_ratetable[ 3 ].hw_value_short = 0;
__carl9170_ratetable[ 4 ].flags = 0;
__carl9170_ratetable[ 4 ].bitrate = 60;
__carl9170_ratetable[ 4 ].hw_value = 11;
__carl9170_ratetable[ 4 ].hw_value_short = 0;
__carl9170_ratetable[ 5 ].flags = 0;
__carl9170_ratetable[ 5 ].bitrate = 90;
__carl9170_ratetable[ 5 ].hw_value = 15;
__carl9170_ratetable[ 5 ].hw_value_short = 0;
__carl9170_ratetable[ 6 ].flags = 0;
__carl9170_ratetable[ 6 ].bitrate = 120;
__carl9170_ratetable[ 6 ].hw_value = 10;
__carl9170_ratetable[ 6 ].hw_value_short = 0;
__carl9170_ratetable[ 7 ].flags = 0;
__carl9170_ratetable[ 7 ].bitrate = 180;
__carl9170_ratetable[ 7 ].hw_value = 14;
__carl9170_ratetable[ 7 ].hw_value_short = 0;
__carl9170_ratetable[ 8 ].flags = 0;
__carl9170_ratetable[ 8 ].bitrate = 240;
__carl9170_ratetable[ 8 ].hw_value = 9;
__carl9170_ratetable[ 8 ].hw_value_short = 0;
__carl9170_ratetable[ 9 ].flags = 0;
__carl9170_ratetable[ 9 ].bitrate = 360;
__carl9170_ratetable[ 9 ].hw_value = 13 | 1 << 4;
__carl9170_ratetable[ 9 ].hw_value_short = 0;
__carl9170_ratetable[ 10 ].flags = 0;
__carl9170_ratetable[ 10 ].bitrate = 480;
__carl9170_ratetable[ 10 ].hw_value = 8 | 2 << 4;
__carl9170_ratetable[ 10 ].hw_value_short = 0;
__carl9170_ratetable[ 11 ].flags = 0;
__carl9170_ratetable[ 11 ].bitrate = 540;
__carl9170_ratetable[ 11 ].hw_value = 12 | 3 << 4;
__carl9170_ratetable[ 11 ].hw_value_short = 0;
carl9170_2ghz_chantable[ 0 ].band = 0;
carl9170_2ghz_chantable[ 0 ].center_freq = 2412;
carl9170_2ghz_chantable[ 0 ].hw_value = 0;
carl9170_2ghz_chantable[ 0 ].flags = 0;
carl9170_2ghz_chantable[ 0 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 0 ].max_power = 18;
carl9170_2ghz_chantable[ 0 ].beacon_found = 0;
carl9170_2ghz_chantable[ 0 ].orig_flags = 0;
carl9170_2ghz_chantable[ 0 ].orig_mag = 0;
carl9170_2ghz_chantable[ 0 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 1 ].band = 0;
carl9170_2ghz_chantable[ 1 ].center_freq = 2417;
carl9170_2ghz_chantable[ 1 ].hw_value = 1;
carl9170_2ghz_chantable[ 1 ].flags = 0;
carl9170_2ghz_chantable[ 1 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 1 ].max_power = 18;
carl9170_2ghz_chantable[ 1 ].beacon_found = 0;
carl9170_2ghz_chantable[ 1 ].orig_flags = 0;
carl9170_2ghz_chantable[ 1 ].orig_mag = 0;
carl9170_2ghz_chantable[ 1 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 2 ].band = 0;
carl9170_2ghz_chantable[ 2 ].center_freq = 2422;
carl9170_2ghz_chantable[ 2 ].hw_value = 2;
carl9170_2ghz_chantable[ 2 ].flags = 0;
carl9170_2ghz_chantable[ 2 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 2 ].max_power = 18;
carl9170_2ghz_chantable[ 2 ].beacon_found = 0;
carl9170_2ghz_chantable[ 2 ].orig_flags = 0;
carl9170_2ghz_chantable[ 2 ].orig_mag = 0;
carl9170_2ghz_chantable[ 2 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 3 ].band = 0;
carl9170_2ghz_chantable[ 3 ].center_freq = 2427;
carl9170_2ghz_chantable[ 3 ].hw_value = 3;
carl9170_2ghz_chantable[ 3 ].flags = 0;
carl9170_2ghz_chantable[ 3 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 3 ].max_power = 18;
carl9170_2ghz_chantable[ 3 ].beacon_found = 0;
carl9170_2ghz_chantable[ 3 ].orig_flags = 0;
carl9170_2ghz_chantable[ 3 ].orig_mag = 0;
carl9170_2ghz_chantable[ 3 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 4 ].band = 0;
carl9170_2ghz_chantable[ 4 ].center_freq = 2432;
carl9170_2ghz_chantable[ 4 ].hw_value = 4;
carl9170_2ghz_chantable[ 4 ].flags = 0;
carl9170_2ghz_chantable[ 4 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 4 ].max_power = 18;
carl9170_2ghz_chantable[ 4 ].beacon_found = 0;
carl9170_2ghz_chantable[ 4 ].orig_flags = 0;
carl9170_2ghz_chantable[ 4 ].orig_mag = 0;
carl9170_2ghz_chantable[ 4 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 5 ].band = 0;
carl9170_2ghz_chantable[ 5 ].center_freq = 2437;
carl9170_2ghz_chantable[ 5 ].hw_value = 5;
carl9170_2ghz_chantable[ 5 ].flags = 0;
carl9170_2ghz_chantable[ 5 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 5 ].max_power = 18;
carl9170_2ghz_chantable[ 5 ].beacon_found = 0;
carl9170_2ghz_chantable[ 5 ].orig_flags = 0;
carl9170_2ghz_chantable[ 5 ].orig_mag = 0;
carl9170_2ghz_chantable[ 5 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 6 ].band = 0;
carl9170_2ghz_chantable[ 6 ].center_freq = 2442;
carl9170_2ghz_chantable[ 6 ].hw_value = 6;
carl9170_2ghz_chantable[ 6 ].flags = 0;
carl9170_2ghz_chantable[ 6 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 6 ].max_power = 18;
carl9170_2ghz_chantable[ 6 ].beacon_found = 0;
carl9170_2ghz_chantable[ 6 ].orig_flags = 0;
carl9170_2ghz_chantable[ 6 ].orig_mag = 0;
carl9170_2ghz_chantable[ 6 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 7 ].band = 0;
carl9170_2ghz_chantable[ 7 ].center_freq = 2447;
carl9170_2ghz_chantable[ 7 ].hw_value = 7;
carl9170_2ghz_chantable[ 7 ].flags = 0;
carl9170_2ghz_chantable[ 7 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 7 ].max_power = 18;
carl9170_2ghz_chantable[ 7 ].beacon_found = 0;
carl9170_2ghz_chantable[ 7 ].orig_flags = 0;
carl9170_2ghz_chantable[ 7 ].orig_mag = 0;
carl9170_2ghz_chantable[ 7 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 8 ].band = 0;
carl9170_2ghz_chantable[ 8 ].center_freq = 2452;
carl9170_2ghz_chantable[ 8 ].hw_value = 8;
carl9170_2ghz_chantable[ 8 ].flags = 0;
carl9170_2ghz_chantable[ 8 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 8 ].max_power = 18;
carl9170_2ghz_chantable[ 8 ].beacon_found = 0;
carl9170_2ghz_chantable[ 8 ].orig_flags = 0;
carl9170_2ghz_chantable[ 8 ].orig_mag = 0;
carl9170_2ghz_chantable[ 8 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 9 ].band = 0;
carl9170_2ghz_chantable[ 9 ].center_freq = 2457;
carl9170_2ghz_chantable[ 9 ].hw_value = 9;
carl9170_2ghz_chantable[ 9 ].flags = 0;
carl9170_2ghz_chantable[ 9 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 9 ].max_power = 18;
carl9170_2ghz_chantable[ 9 ].beacon_found = 0;
carl9170_2ghz_chantable[ 9 ].orig_flags = 0;
carl9170_2ghz_chantable[ 9 ].orig_mag = 0;
carl9170_2ghz_chantable[ 9 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 10 ].band = 0;
carl9170_2ghz_chantable[ 10 ].center_freq = 2462;
carl9170_2ghz_chantable[ 10 ].hw_value = 10;
carl9170_2ghz_chantable[ 10 ].flags = 0;
carl9170_2ghz_chantable[ 10 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 10 ].max_power = 18;
carl9170_2ghz_chantable[ 10 ].beacon_found = 0;
carl9170_2ghz_chantable[ 10 ].orig_flags = 0;
carl9170_2ghz_chantable[ 10 ].orig_mag = 0;
carl9170_2ghz_chantable[ 10 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 11 ].band = 0;
carl9170_2ghz_chantable[ 11 ].center_freq = 2467;
carl9170_2ghz_chantable[ 11 ].hw_value = 11;
carl9170_2ghz_chantable[ 11 ].flags = 0;
carl9170_2ghz_chantable[ 11 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 11 ].max_power = 18;
carl9170_2ghz_chantable[ 11 ].beacon_found = 0;
carl9170_2ghz_chantable[ 11 ].orig_flags = 0;
carl9170_2ghz_chantable[ 11 ].orig_mag = 0;
carl9170_2ghz_chantable[ 11 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 12 ].band = 0;
carl9170_2ghz_chantable[ 12 ].center_freq = 2472;
carl9170_2ghz_chantable[ 12 ].hw_value = 12;
carl9170_2ghz_chantable[ 12 ].flags = 0;
carl9170_2ghz_chantable[ 12 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 12 ].max_power = 18;
carl9170_2ghz_chantable[ 12 ].beacon_found = 0;
carl9170_2ghz_chantable[ 12 ].orig_flags = 0;
carl9170_2ghz_chantable[ 12 ].orig_mag = 0;
carl9170_2ghz_chantable[ 12 ].orig_mpwr = 0;
carl9170_2ghz_chantable[ 13 ].band = 0;
carl9170_2ghz_chantable[ 13 ].center_freq = 2484;
carl9170_2ghz_chantable[ 13 ].hw_value = 13;
carl9170_2ghz_chantable[ 13 ].flags = 0;
carl9170_2ghz_chantable[ 13 ].max_antenna_gain = 0;
carl9170_2ghz_chantable[ 13 ].max_power = 18;
carl9170_2ghz_chantable[ 13 ].beacon_found = 0;
carl9170_2ghz_chantable[ 13 ].orig_flags = 0;
carl9170_2ghz_chantable[ 13 ].orig_mag = 0;
carl9170_2ghz_chantable[ 13 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 0 ].band = 0;
carl9170_5ghz_chantable[ 0 ].center_freq = 4920;
carl9170_5ghz_chantable[ 0 ].hw_value = 14;
carl9170_5ghz_chantable[ 0 ].flags = 0;
carl9170_5ghz_chantable[ 0 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 0 ].max_power = 18;
carl9170_5ghz_chantable[ 0 ].beacon_found = 0;
carl9170_5ghz_chantable[ 0 ].orig_flags = 0;
carl9170_5ghz_chantable[ 0 ].orig_mag = 0;
carl9170_5ghz_chantable[ 0 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 1 ].band = 0;
carl9170_5ghz_chantable[ 1 ].center_freq = 4940;
carl9170_5ghz_chantable[ 1 ].hw_value = 15;
carl9170_5ghz_chantable[ 1 ].flags = 0;
carl9170_5ghz_chantable[ 1 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 1 ].max_power = 18;
carl9170_5ghz_chantable[ 1 ].beacon_found = 0;
carl9170_5ghz_chantable[ 1 ].orig_flags = 0;
carl9170_5ghz_chantable[ 1 ].orig_mag = 0;
carl9170_5ghz_chantable[ 1 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 2 ].band = 0;
carl9170_5ghz_chantable[ 2 ].center_freq = 4960;
carl9170_5ghz_chantable[ 2 ].hw_value = 16;
carl9170_5ghz_chantable[ 2 ].flags = 0;
carl9170_5ghz_chantable[ 2 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 2 ].max_power = 18;
carl9170_5ghz_chantable[ 2 ].beacon_found = 0;
carl9170_5ghz_chantable[ 2 ].orig_flags = 0;
carl9170_5ghz_chantable[ 2 ].orig_mag = 0;
carl9170_5ghz_chantable[ 2 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 3 ].band = 0;
carl9170_5ghz_chantable[ 3 ].center_freq = 4980;
carl9170_5ghz_chantable[ 3 ].hw_value = 17;
carl9170_5ghz_chantable[ 3 ].flags = 0;
carl9170_5ghz_chantable[ 3 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 3 ].max_power = 18;
carl9170_5ghz_chantable[ 3 ].beacon_found = 0;
carl9170_5ghz_chantable[ 3 ].orig_flags = 0;
carl9170_5ghz_chantable[ 3 ].orig_mag = 0;
carl9170_5ghz_chantable[ 3 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 4 ].band = 0;
carl9170_5ghz_chantable[ 4 ].center_freq = 5040;
carl9170_5ghz_chantable[ 4 ].hw_value = 18;
carl9170_5ghz_chantable[ 4 ].flags = 0;
carl9170_5ghz_chantable[ 4 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 4 ].max_power = 18;
carl9170_5ghz_chantable[ 4 ].beacon_found = 0;
carl9170_5ghz_chantable[ 4 ].orig_flags = 0;
carl9170_5ghz_chantable[ 4 ].orig_mag = 0;
carl9170_5ghz_chantable[ 4 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 5 ].band = 0;
carl9170_5ghz_chantable[ 5 ].center_freq = 5060;
carl9170_5ghz_chantable[ 5 ].hw_value = 19;
carl9170_5ghz_chantable[ 5 ].flags = 0;
carl9170_5ghz_chantable[ 5 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 5 ].max_power = 18;
carl9170_5ghz_chantable[ 5 ].beacon_found = 0;
carl9170_5ghz_chantable[ 5 ].orig_flags = 0;
carl9170_5ghz_chantable[ 5 ].orig_mag = 0;
carl9170_5ghz_chantable[ 5 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 6 ].band = 0;
carl9170_5ghz_chantable[ 6 ].center_freq = 5080;
carl9170_5ghz_chantable[ 6 ].hw_value = 20;
carl9170_5ghz_chantable[ 6 ].flags = 0;
carl9170_5ghz_chantable[ 6 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 6 ].max_power = 18;
carl9170_5ghz_chantable[ 6 ].beacon_found = 0;
carl9170_5ghz_chantable[ 6 ].orig_flags = 0;
carl9170_5ghz_chantable[ 6 ].orig_mag = 0;
carl9170_5ghz_chantable[ 6 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 7 ].band = 0;
carl9170_5ghz_chantable[ 7 ].center_freq = 5180;
carl9170_5ghz_chantable[ 7 ].hw_value = 21;
carl9170_5ghz_chantable[ 7 ].flags = 0;
carl9170_5ghz_chantable[ 7 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 7 ].max_power = 18;
carl9170_5ghz_chantable[ 7 ].beacon_found = 0;
carl9170_5ghz_chantable[ 7 ].orig_flags = 0;
carl9170_5ghz_chantable[ 7 ].orig_mag = 0;
carl9170_5ghz_chantable[ 7 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 8 ].band = 0;
carl9170_5ghz_chantable[ 8 ].center_freq = 5200;
carl9170_5ghz_chantable[ 8 ].hw_value = 22;
carl9170_5ghz_chantable[ 8 ].flags = 0;
carl9170_5ghz_chantable[ 8 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 8 ].max_power = 18;
carl9170_5ghz_chantable[ 8 ].beacon_found = 0;
carl9170_5ghz_chantable[ 8 ].orig_flags = 0;
carl9170_5ghz_chantable[ 8 ].orig_mag = 0;
carl9170_5ghz_chantable[ 8 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 9 ].band = 0;
carl9170_5ghz_chantable[ 9 ].center_freq = 5220;
carl9170_5ghz_chantable[ 9 ].hw_value = 23;
carl9170_5ghz_chantable[ 9 ].flags = 0;
carl9170_5ghz_chantable[ 9 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 9 ].max_power = 18;
carl9170_5ghz_chantable[ 9 ].beacon_found = 0;
carl9170_5ghz_chantable[ 9 ].orig_flags = 0;
carl9170_5ghz_chantable[ 9 ].orig_mag = 0;
carl9170_5ghz_chantable[ 9 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 10 ].band = 0;
carl9170_5ghz_chantable[ 10 ].center_freq = 5240;
carl9170_5ghz_chantable[ 10 ].hw_value = 24;
carl9170_5ghz_chantable[ 10 ].flags = 0;
carl9170_5ghz_chantable[ 10 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 10 ].max_power = 18;
carl9170_5ghz_chantable[ 10 ].beacon_found = 0;
carl9170_5ghz_chantable[ 10 ].orig_flags = 0;
carl9170_5ghz_chantable[ 10 ].orig_mag = 0;
carl9170_5ghz_chantable[ 10 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 11 ].band = 0;
carl9170_5ghz_chantable[ 11 ].center_freq = 5260;
carl9170_5ghz_chantable[ 11 ].hw_value = 25;
carl9170_5ghz_chantable[ 11 ].flags = 0;
carl9170_5ghz_chantable[ 11 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 11 ].max_power = 18;
carl9170_5ghz_chantable[ 11 ].beacon_found = 0;
carl9170_5ghz_chantable[ 11 ].orig_flags = 0;
carl9170_5ghz_chantable[ 11 ].orig_mag = 0;
carl9170_5ghz_chantable[ 11 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 12 ].band = 0;
carl9170_5ghz_chantable[ 12 ].center_freq = 5280;
carl9170_5ghz_chantable[ 12 ].hw_value = 26;
carl9170_5ghz_chantable[ 12 ].flags = 0;
carl9170_5ghz_chantable[ 12 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 12 ].max_power = 18;
carl9170_5ghz_chantable[ 12 ].beacon_found = 0;
carl9170_5ghz_chantable[ 12 ].orig_flags = 0;
carl9170_5ghz_chantable[ 12 ].orig_mag = 0;
carl9170_5ghz_chantable[ 12 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 13 ].band = 0;
carl9170_5ghz_chantable[ 13 ].center_freq = 5300;
carl9170_5ghz_chantable[ 13 ].hw_value = 27;
carl9170_5ghz_chantable[ 13 ].flags = 0;
carl9170_5ghz_chantable[ 13 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 13 ].max_power = 18;
carl9170_5ghz_chantable[ 13 ].beacon_found = 0;
carl9170_5ghz_chantable[ 13 ].orig_flags = 0;
carl9170_5ghz_chantable[ 13 ].orig_mag = 0;
carl9170_5ghz_chantable[ 13 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 14 ].band = 0;
carl9170_5ghz_chantable[ 14 ].center_freq = 5320;
carl9170_5ghz_chantable[ 14 ].hw_value = 28;
carl9170_5ghz_chantable[ 14 ].flags = 0;
carl9170_5ghz_chantable[ 14 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 14 ].max_power = 18;
carl9170_5ghz_chantable[ 14 ].beacon_found = 0;
carl9170_5ghz_chantable[ 14 ].orig_flags = 0;
carl9170_5ghz_chantable[ 14 ].orig_mag = 0;
carl9170_5ghz_chantable[ 14 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 15 ].band = 0;
carl9170_5ghz_chantable[ 15 ].center_freq = 5500;
carl9170_5ghz_chantable[ 15 ].hw_value = 29;
carl9170_5ghz_chantable[ 15 ].flags = 0;
carl9170_5ghz_chantable[ 15 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 15 ].max_power = 18;
carl9170_5ghz_chantable[ 15 ].beacon_found = 0;
carl9170_5ghz_chantable[ 15 ].orig_flags = 0;
carl9170_5ghz_chantable[ 15 ].orig_mag = 0;
carl9170_5ghz_chantable[ 15 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 16 ].band = 0;
carl9170_5ghz_chantable[ 16 ].center_freq = 5520;
carl9170_5ghz_chantable[ 16 ].hw_value = 30;
carl9170_5ghz_chantable[ 16 ].flags = 0;
carl9170_5ghz_chantable[ 16 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 16 ].max_power = 18;
carl9170_5ghz_chantable[ 16 ].beacon_found = 0;
carl9170_5ghz_chantable[ 16 ].orig_flags = 0;
carl9170_5ghz_chantable[ 16 ].orig_mag = 0;
carl9170_5ghz_chantable[ 16 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 17 ].band = 0;
carl9170_5ghz_chantable[ 17 ].center_freq = 5540;
carl9170_5ghz_chantable[ 17 ].hw_value = 31;
carl9170_5ghz_chantable[ 17 ].flags = 0;
carl9170_5ghz_chantable[ 17 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 17 ].max_power = 18;
carl9170_5ghz_chantable[ 17 ].beacon_found = 0;
carl9170_5ghz_chantable[ 17 ].orig_flags = 0;
carl9170_5ghz_chantable[ 17 ].orig_mag = 0;
carl9170_5ghz_chantable[ 17 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 18 ].band = 0;
carl9170_5ghz_chantable[ 18 ].center_freq = 5560;
carl9170_5ghz_chantable[ 18 ].hw_value = 32;
carl9170_5ghz_chantable[ 18 ].flags = 0;
carl9170_5ghz_chantable[ 18 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 18 ].max_power = 18;
carl9170_5ghz_chantable[ 18 ].beacon_found = 0;
carl9170_5ghz_chantable[ 18 ].orig_flags = 0;
carl9170_5ghz_chantable[ 18 ].orig_mag = 0;
carl9170_5ghz_chantable[ 18 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 19 ].band = 0;
carl9170_5ghz_chantable[ 19 ].center_freq = 5580;
carl9170_5ghz_chantable[ 19 ].hw_value = 33;
carl9170_5ghz_chantable[ 19 ].flags = 0;
carl9170_5ghz_chantable[ 19 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 19 ].max_power = 18;
carl9170_5ghz_chantable[ 19 ].beacon_found = 0;
carl9170_5ghz_chantable[ 19 ].orig_flags = 0;
carl9170_5ghz_chantable[ 19 ].orig_mag = 0;
carl9170_5ghz_chantable[ 19 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 20 ].band = 0;
carl9170_5ghz_chantable[ 20 ].center_freq = 5600;
carl9170_5ghz_chantable[ 20 ].hw_value = 34;
carl9170_5ghz_chantable[ 20 ].flags = 0;
carl9170_5ghz_chantable[ 20 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 20 ].max_power = 18;
carl9170_5ghz_chantable[ 20 ].beacon_found = 0;
carl9170_5ghz_chantable[ 20 ].orig_flags = 0;
carl9170_5ghz_chantable[ 20 ].orig_mag = 0;
carl9170_5ghz_chantable[ 20 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 21 ].band = 0;
carl9170_5ghz_chantable[ 21 ].center_freq = 5620;
carl9170_5ghz_chantable[ 21 ].hw_value = 35;
carl9170_5ghz_chantable[ 21 ].flags = 0;
carl9170_5ghz_chantable[ 21 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 21 ].max_power = 18;
carl9170_5ghz_chantable[ 21 ].beacon_found = 0;
carl9170_5ghz_chantable[ 21 ].orig_flags = 0;
carl9170_5ghz_chantable[ 21 ].orig_mag = 0;
carl9170_5ghz_chantable[ 21 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 22 ].band = 0;
carl9170_5ghz_chantable[ 22 ].center_freq = 5640;
carl9170_5ghz_chantable[ 22 ].hw_value = 36;
carl9170_5ghz_chantable[ 22 ].flags = 0;
carl9170_5ghz_chantable[ 22 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 22 ].max_power = 18;
carl9170_5ghz_chantable[ 22 ].beacon_found = 0;
carl9170_5ghz_chantable[ 22 ].orig_flags = 0;
carl9170_5ghz_chantable[ 22 ].orig_mag = 0;
carl9170_5ghz_chantable[ 22 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 23 ].band = 0;
carl9170_5ghz_chantable[ 23 ].center_freq = 5660;
carl9170_5ghz_chantable[ 23 ].hw_value = 37;
carl9170_5ghz_chantable[ 23 ].flags = 0;
carl9170_5ghz_chantable[ 23 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 23 ].max_power = 18;
carl9170_5ghz_chantable[ 23 ].beacon_found = 0;
carl9170_5ghz_chantable[ 23 ].orig_flags = 0;
carl9170_5ghz_chantable[ 23 ].orig_mag = 0;
carl9170_5ghz_chantable[ 23 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 24 ].band = 0;
carl9170_5ghz_chantable[ 24 ].center_freq = 5680;
carl9170_5ghz_chantable[ 24 ].hw_value = 38;
carl9170_5ghz_chantable[ 24 ].flags = 0;
carl9170_5ghz_chantable[ 24 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 24 ].max_power = 18;
carl9170_5ghz_chantable[ 24 ].beacon_found = 0;
carl9170_5ghz_chantable[ 24 ].orig_flags = 0;
carl9170_5ghz_chantable[ 24 ].orig_mag = 0;
carl9170_5ghz_chantable[ 24 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 25 ].band = 0;
carl9170_5ghz_chantable[ 25 ].center_freq = 5700;
carl9170_5ghz_chantable[ 25 ].hw_value = 39;
carl9170_5ghz_chantable[ 25 ].flags = 0;
carl9170_5ghz_chantable[ 25 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 25 ].max_power = 18;
carl9170_5ghz_chantable[ 25 ].beacon_found = 0;
carl9170_5ghz_chantable[ 25 ].orig_flags = 0;
carl9170_5ghz_chantable[ 25 ].orig_mag = 0;
carl9170_5ghz_chantable[ 25 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 26 ].band = 0;
carl9170_5ghz_chantable[ 26 ].center_freq = 5745;
carl9170_5ghz_chantable[ 26 ].hw_value = 40;
carl9170_5ghz_chantable[ 26 ].flags = 0;
carl9170_5ghz_chantable[ 26 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 26 ].max_power = 18;
carl9170_5ghz_chantable[ 26 ].beacon_found = 0;
carl9170_5ghz_chantable[ 26 ].orig_flags = 0;
carl9170_5ghz_chantable[ 26 ].orig_mag = 0;
carl9170_5ghz_chantable[ 26 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 27 ].band = 0;
carl9170_5ghz_chantable[ 27 ].center_freq = 5765;
carl9170_5ghz_chantable[ 27 ].hw_value = 41;
carl9170_5ghz_chantable[ 27 ].flags = 0;
carl9170_5ghz_chantable[ 27 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 27 ].max_power = 18;
carl9170_5ghz_chantable[ 27 ].beacon_found = 0;
carl9170_5ghz_chantable[ 27 ].orig_flags = 0;
carl9170_5ghz_chantable[ 27 ].orig_mag = 0;
carl9170_5ghz_chantable[ 27 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 28 ].band = 0;
carl9170_5ghz_chantable[ 28 ].center_freq = 5785;
carl9170_5ghz_chantable[ 28 ].hw_value = 42;
carl9170_5ghz_chantable[ 28 ].flags = 0;
carl9170_5ghz_chantable[ 28 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 28 ].max_power = 18;
carl9170_5ghz_chantable[ 28 ].beacon_found = 0;
carl9170_5ghz_chantable[ 28 ].orig_flags = 0;
carl9170_5ghz_chantable[ 28 ].orig_mag = 0;
carl9170_5ghz_chantable[ 28 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 29 ].band = 0;
carl9170_5ghz_chantable[ 29 ].center_freq = 5805;
carl9170_5ghz_chantable[ 29 ].hw_value = 43;
carl9170_5ghz_chantable[ 29 ].flags = 0;
carl9170_5ghz_chantable[ 29 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 29 ].max_power = 18;
carl9170_5ghz_chantable[ 29 ].beacon_found = 0;
carl9170_5ghz_chantable[ 29 ].orig_flags = 0;
carl9170_5ghz_chantable[ 29 ].orig_mag = 0;
carl9170_5ghz_chantable[ 29 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 30 ].band = 0;
carl9170_5ghz_chantable[ 30 ].center_freq = 5825;
carl9170_5ghz_chantable[ 30 ].hw_value = 44;
carl9170_5ghz_chantable[ 30 ].flags = 0;
carl9170_5ghz_chantable[ 30 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 30 ].max_power = 18;
carl9170_5ghz_chantable[ 30 ].beacon_found = 0;
carl9170_5ghz_chantable[ 30 ].orig_flags = 0;
carl9170_5ghz_chantable[ 30 ].orig_mag = 0;
carl9170_5ghz_chantable[ 30 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 31 ].band = 0;
carl9170_5ghz_chantable[ 31 ].center_freq = 5170;
carl9170_5ghz_chantable[ 31 ].hw_value = 45;
carl9170_5ghz_chantable[ 31 ].flags = 0;
carl9170_5ghz_chantable[ 31 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 31 ].max_power = 18;
carl9170_5ghz_chantable[ 31 ].beacon_found = 0;
carl9170_5ghz_chantable[ 31 ].orig_flags = 0;
carl9170_5ghz_chantable[ 31 ].orig_mag = 0;
carl9170_5ghz_chantable[ 31 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 32 ].band = 0;
carl9170_5ghz_chantable[ 32 ].center_freq = 5190;
carl9170_5ghz_chantable[ 32 ].hw_value = 46;
carl9170_5ghz_chantable[ 32 ].flags = 0;
carl9170_5ghz_chantable[ 32 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 32 ].max_power = 18;
carl9170_5ghz_chantable[ 32 ].beacon_found = 0;
carl9170_5ghz_chantable[ 32 ].orig_flags = 0;
carl9170_5ghz_chantable[ 32 ].orig_mag = 0;
carl9170_5ghz_chantable[ 32 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 33 ].band = 0;
carl9170_5ghz_chantable[ 33 ].center_freq = 5210;
carl9170_5ghz_chantable[ 33 ].hw_value = 47;
carl9170_5ghz_chantable[ 33 ].flags = 0;
carl9170_5ghz_chantable[ 33 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 33 ].max_power = 18;
carl9170_5ghz_chantable[ 33 ].beacon_found = 0;
carl9170_5ghz_chantable[ 33 ].orig_flags = 0;
carl9170_5ghz_chantable[ 33 ].orig_mag = 0;
carl9170_5ghz_chantable[ 33 ].orig_mpwr = 0;
carl9170_5ghz_chantable[ 34 ].band = 0;
carl9170_5ghz_chantable[ 34 ].center_freq = 5230;
carl9170_5ghz_chantable[ 34 ].hw_value = 48;
carl9170_5ghz_chantable[ 34 ].flags = 0;
carl9170_5ghz_chantable[ 34 ].max_antenna_gain = 0;
carl9170_5ghz_chantable[ 34 ].max_power = 18;
carl9170_5ghz_chantable[ 34 ].beacon_found = 0;
carl9170_5ghz_chantable[ 34 ].orig_flags = 0;
carl9170_5ghz_chantable[ 34 ].orig_mag = 0;
carl9170_5ghz_chantable[ 34 ].orig_mpwr = 0;
carl9170_band_2GHz.channels = carl9170_2ghz_chantable;
carl9170_band_2GHz.bitrates = __carl9170_ratetable + 0;
carl9170_band_2GHz.band = 0;
carl9170_band_2GHz.n_channels = 32256 / 2304 + 0;
carl9170_band_2GHz.n_bitrates = 12;
carl9170_band_2GHz.ht_cap.cap = 6222;
carl9170_band_2GHz.ht_cap.ht_supported = 1;
carl9170_band_2GHz.ht_cap.ampdu_factor = 3;
carl9170_band_2GHz.ht_cap.ampdu_density = 6;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 0 ] = 255;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 1 ] = 255;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 2 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 3 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 4 ] = 1;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 5 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 6 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 7 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 8 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_mask[ 9 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.rx_highest = 300;
carl9170_band_2GHz.ht_cap.mcs.tx_params = 1;
carl9170_band_2GHz.ht_cap.mcs.reserved[ 0 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.reserved[ 1 ] = 0;
carl9170_band_2GHz.ht_cap.mcs.reserved[ 2 ] = 0;
carl9170_band_5GHz.channels = carl9170_5ghz_chantable;
carl9170_band_5GHz.bitrates = __carl9170_ratetable + 4;
carl9170_band_5GHz.band = 0;
carl9170_band_5GHz.n_channels = 80640 / 2304 + 0;
carl9170_band_5GHz.n_bitrates = 8;
carl9170_band_5GHz.ht_cap.cap = 6222;
carl9170_band_5GHz.ht_cap.ht_supported = 1;
carl9170_band_5GHz.ht_cap.ampdu_factor = 3;
carl9170_band_5GHz.ht_cap.ampdu_density = 6;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 0 ] = 255;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 1 ] = 255;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 2 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 3 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 4 ] = 1;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 5 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 6 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 7 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 8 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_mask[ 9 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.rx_highest = 300;
carl9170_band_5GHz.ht_cap.mcs.tx_params = 1;
carl9170_band_5GHz.ht_cap.mcs.reserved[ 0 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.reserved[ 1 ] = 0;
carl9170_band_5GHz.ht_cap.mcs.reserved[ 2 ] = 0;
descriptor.modname = "main";
descriptor.function = "carl9170_restart";
descriptor.filename = "/home/ldv/ldv-new/ldv-tools-inst/tmp/run/work/current--X--test-0032-net-wireless-ath-carl9170-unsafe.tar.bz2_1--X--defaultlinux-2.6.37--X--32_7/linux-2.6.37/csd_deg_dscv/2/dscv_tempdir/dscv/ri/32_7/drivers/test-0032-net-wireless-ath-carl9170-unsafe/carl9170/main.c.common.c";
descriptor.format = "ignoring restart (%d)\n";
descriptor.lineno = 510;
descriptor.flags = 0;
descriptor.enabled = 0;
carl9170_ops.tx = &(carl9170_op_tx);
carl9170_ops.start = &(carl9170_op_start);
carl9170_ops.stop = &(carl9170_op_stop);
carl9170_ops.add_interface = &(carl9170_op_add_interface);
carl9170_ops.change_interface = 0;
carl9170_ops.remove_interface = &(carl9170_op_remove_interface);
carl9170_ops.config = &(carl9170_op_config);
carl9170_ops.bss_info_changed = &(carl9170_op_bss_info_changed);
carl9170_ops.prepare_multicast = &(carl9170_op_prepare_multicast);
carl9170_ops.configure_filter = &(carl9170_op_configure_filter);
carl9170_ops.set_tim = 0;
carl9170_ops.set_key = &(carl9170_op_set_key);
carl9170_ops.update_tkip_key = 0;
carl9170_ops.hw_scan = 0;
carl9170_ops.sw_scan_start = 0;
carl9170_ops.sw_scan_complete = 0;
carl9170_ops.get_stats = &(carl9170_op_get_stats);
carl9170_ops.get_tkip_seq = 0;
carl9170_ops.set_rts_threshold = 0;
carl9170_ops.sta_add = &(carl9170_op_sta_add);
carl9170_ops.sta_remove = &(carl9170_op_sta_remove);
carl9170_ops.sta_notify = &(carl9170_op_sta_notify);
carl9170_ops.conf_tx = &(carl9170_op_conf_tx);
carl9170_ops.get_tsf = &(carl9170_op_get_tsf);
carl9170_ops.set_tsf = 0;
carl9170_ops.reset_tsf = 0;
carl9170_ops.tx_last_beacon = 0;
carl9170_ops.ampdu_action = &(carl9170_op_ampdu_action);
carl9170_ops.get_survey = &(carl9170_op_get_survey);
carl9170_ops.rfkill_poll = 0;
carl9170_ops.set_coverage_class = 0;
carl9170_ops.testmode_cmd = 0;
carl9170_ops.flush = &(carl9170_op_flush);
carl9170_ops.channel_switch = 0;
carl9170_ops.napi_poll = 0;
ldv_mutex_TEMPLATE = 1;

return 0;

}

3182 LDV_IN_INTERRUPT = 1;

3191 -ldv_initialize_FOREACH();

{

-ldv_initialize_mutex();

{

4833 ldv_mutex_mutex = 1;

return 0;

}

return 0;

}

3195 tmp___8 = nondet_int() { /* The function body is undefined. */ };

3195 assert(tmp___8 != 0);

3198 tmp___7 = nondet_int() { /* The function body is undefined. */ };

3200 assert(tmp___7 != 0);

3280 assert(tmp___7 != 1);

3360 assert(tmp___7 != 2);

3440 assert(tmp___7 != 3);

3520 assert(tmp___7 != 4);

3600 assert(tmp___7 != 5);

3680 assert(tmp___7 != 6);

3760 assert(tmp___7 != 7);

3840 assert(tmp___7 != 8);

3920 assert(tmp___7 != 9);

4000 assert(tmp___7 != 10);

4080 assert(tmp___7 == 11);

4130 -carl9170_op_set_key(var_group1 /* hw */, var_carl9170_op_set_key_20_p1 /* cmd */, var_carl9170_op_set_key_20_p2 /* vif */, var_carl9170_op_set_key_20_p3 /* sta */, var_carl9170_op_set_key_20_p4 /* key */);

{

1031 -ar = *(hw).priv;
err = 0;

1035 assert(*(ar).disable_offload == 0);

1035 assert(vif != 0);

1047 -tmp___7 = is_main_vif(ar /* ar */, vif /* vif */);

{

622 -rcu_read_lock();

{

561 -__rcu_read_lock();

{

98 return 0;

}

559 return 0;

}

623 -tmp___7 = carl9170_get_main_vif(ar /* ar */);

{

610 -__ptr = *(ar).vif_list.next;
cil_14 = &(__ptr);
_________p1 = *(cil_14);

610 tmp___7 = debug_lockdep_rcu_enabled() { /* The function body is undefined. */ };

610 assert(tmp___7 == 0);

610 -__mptr = _________p1;
cil_15 = 0;
cvif = __mptr - &(cil_15)->list;

610 __builtin_prefetch(*(cvif).list.next) { /* The function body is undefined. */ };

610 assert(&(cvif)->list == &(ar)->vif_list);

615 __retres18 = 0;

606 return __retres18;

}

606 assert(tmp___7 != vif);

606 __cil_tmp5 = 0;

623 ret = __cil_tmp5;

624 -rcu_read_unlock();

{

585 -__rcu_read_unlock();

{

103 return 0;

}

581 return 0;

}

625 return ret;

}

1047 assert(tmp___7 == 0);

1159 assert(*(ar).rx_software_decryption != 0);

1163 -mutex_unlock_mutex(&(ar)->mutex /* lock */);

{

4817 assert(ldv_mutex_mutex != 2);

4817 -ldv_blast_assert();

{
}

}

Source code

carl9170.h
main.c.common.c
wlan.h
rcupdate.h

1 /* 2 * Atheros CARL9170 driver 3 * 4 * Driver specific definitions 5 * 6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 7 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; see the file COPYING. If not, see 21 * http://www.gnu.org/licenses/. 22 * 23 * This file incorporates work covered by the following copyright and 24 * permission notice: 25 * Copyright (c) 2007-2008 Atheros Communications, Inc. 26 * 27 * Permission to use, copy, modify, and/or distribute this software for any 28 * purpose with or without fee is hereby granted, provided that the above 29 * copyright notice and this permission notice appear in all copies. 30 * 31 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 32 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 33 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 34 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 35 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 36 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 37 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 38 */ 39 #ifndef __CARL9170_H 40 #define __CARL9170_H 41 42 #include <linux/kernel.h> 43 #include <linux/firmware.h> 44 #include <linux/completion.h> 45 #include <linux/spinlock.h> 46 #include <net/cfg80211.h> 47 #include <net/mac80211.h> 48 #include <linux/usb.h> 49 #ifdef CONFIG_CARL9170_LEDS 50 #include <linux/leds.h> 51 #endif /* CONFIG_CARL170_LEDS */ 52 #ifdef CONFIG_CARL9170_WPC 53 #include <linux/input.h> 54 #endif /* CONFIG_CARL9170_WPC */ 55 #include "eeprom.h" 56 #include "wlan.h" 57 #include "hw.h" 58 #include "fwdesc.h" 59 #include "fwcmd.h" 60 #include "../regd.h" 61 62 #ifdef CONFIG_CARL9170_DEBUGFS 63 #include "debug.h" 64 #endif /* CONFIG_CARL9170_DEBUGFS */ 65 66 #define CARL9170FW_NAME "carl9170-1.fw" 67 68 #define PAYLOAD_MAX (CARL9170_MAX_CMD_LEN / 4 - 1) 69 70 enum carl9170_rf_init_mode { 71 CARL9170_RFI_NONE, 72 CARL9170_RFI_WARM, 73 CARL9170_RFI_COLD, 74 }; 75 76 #define CARL9170_MAX_RX_BUFFER_SIZE 8192 77 78 enum carl9170_device_state { 79 CARL9170_UNKNOWN_STATE, 80 CARL9170_STOPPED, 81 CARL9170_IDLE, 82 CARL9170_STARTED, 83 }; 84 85 #define CARL9170_NUM_TID 16 86 #define WME_BA_BMP_SIZE 64 87 #define CARL9170_TX_USER_RATE_TRIES 3 88 89 #define WME_AC_BE 2 90 #define WME_AC_BK 3 91 #define WME_AC_VI 1 92 #define WME_AC_VO 0 93 94 #define TID_TO_WME_AC(_tid) \ 95 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ 96 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ 97 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ 98 WME_AC_VO) 99 100 #define SEQ_DIFF(_start, _seq) \ 101 (((_start) - (_seq)) & 0x0fff) 102 #define SEQ_PREV(_seq) \ 103 (((_seq) - 1) & 0x0fff) 104 #define SEQ_NEXT(_seq) \ 105 (((_seq) + 1) & 0x0fff) 106 #define BAW_WITHIN(_start, _bawsz, _seqno) \ 107 ((((_seqno) - (_start)) & 0xfff) < (_bawsz)) 108 109 enum carl9170_tid_state { 110 CARL9170_TID_STATE_INVALID, 111 CARL9170_TID_STATE_KILLED, 112 CARL9170_TID_STATE_SHUTDOWN, 113 CARL9170_TID_STATE_SUSPEND, 114 CARL9170_TID_STATE_PROGRESS, 115 CARL9170_TID_STATE_IDLE, 116 CARL9170_TID_STATE_XMIT, 117 }; 118 119 #define CARL9170_BAW_BITS (2 * WME_BA_BMP_SIZE) 120 #define CARL9170_BAW_SIZE (BITS_TO_LONGS(CARL9170_BAW_BITS)) 121 #define CARL9170_BAW_LEN (DIV_ROUND_UP(CARL9170_BAW_BITS, BITS_PER_BYTE)) 122 123 struct carl9170_sta_tid { 124 /* must be the first entry! */ 125 struct list_head list; 126 127 /* temporary list for RCU unlink procedure */ 128 struct list_head tmp_list; 129 130 /* lock for the following data structures */ 131 spinlock_t lock; 132 133 unsigned int counter; 134 enum carl9170_tid_state state; 135 u8 tid; /* TID number ( 0 - 15 ) */ 136 u16 max; /* max. AMPDU size */ 137 138 u16 snx; /* awaiting _next_ frame */ 139 u16 hsn; /* highest _queued_ sequence */ 140 u16 bsn; /* base of the tx/agg bitmap */ 141 unsigned long bitmap[CARL9170_BAW_SIZE]; 142 143 /* Preaggregation reorder queue */ 144 struct sk_buff_head queue; 145 }; 146 147 #define CARL9170_QUEUE_TIMEOUT 256 148 #define CARL9170_BUMP_QUEUE 1000 149 #define CARL9170_TX_TIMEOUT 2500 150 #define CARL9170_JANITOR_DELAY 128 151 #define CARL9170_QUEUE_STUCK_TIMEOUT 5500 152 153 #define CARL9170_NUM_TX_AGG_MAX 30 154 155 /* 156 * Tradeoff between stability/latency and speed. 157 * 158 * AR9170_TXQ_DEPTH is devised by dividing the amount of available 159 * tx buffers with the size of a full ethernet frame + overhead. 160 * 161 * Naturally: The higher the limit, the faster the device CAN send. 162 * However, even a slight over-commitment at the wrong time and the 163 * hardware is doomed to send all already-queued frames at suboptimal 164 * rates. This in turn leads to an enourmous amount of unsuccessful 165 * retries => Latency goes up, whereas the throughput goes down. CRASH! 166 */ 167 #define CARL9170_NUM_TX_LIMIT_HARD ((AR9170_TXQ_DEPTH * 3) / 2) 168 #define CARL9170_NUM_TX_LIMIT_SOFT (AR9170_TXQ_DEPTH) 169 170 struct carl9170_tx_queue_stats { 171 unsigned int count; 172 unsigned int limit; 173 unsigned int len; 174 }; 175 176 struct carl9170_vif { 177 unsigned int id; 178 struct ieee80211_vif *vif; 179 }; 180 181 struct carl9170_vif_info { 182 struct list_head list; 183 bool active; 184 unsigned int id; 185 struct sk_buff *beacon; 186 bool enable_beacon; 187 }; 188 189 #define AR9170_NUM_RX_URBS 16 190 #define AR9170_NUM_RX_URBS_MUL 2 191 #define AR9170_NUM_TX_URBS 8 192 #define AR9170_NUM_RX_URBS_POOL (AR9170_NUM_RX_URBS_MUL * AR9170_NUM_RX_URBS) 193 194 enum carl9170_device_features { 195 CARL9170_WPS_BUTTON = BIT(0), 196 CARL9170_ONE_LED = BIT(1), 197 }; 198 199 #ifdef CONFIG_CARL9170_LEDS 200 struct ar9170; 201 202 struct carl9170_led { 203 struct ar9170 *ar; 204 struct led_classdev l; 205 char name[32]; 206 unsigned int toggled; 207 bool last_state; 208 bool registered; 209 }; 210 #endif /* CONFIG_CARL9170_LEDS */ 211 212 enum carl9170_restart_reasons { 213 CARL9170_RR_NO_REASON = 0, 214 CARL9170_RR_FATAL_FIRMWARE_ERROR, 215 CARL9170_RR_TOO_MANY_FIRMWARE_ERRORS, 216 CARL9170_RR_WATCHDOG, 217 CARL9170_RR_STUCK_TX, 218 CARL9170_RR_SLOW_SYSTEM, 219 CARL9170_RR_COMMAND_TIMEOUT, 220 CARL9170_RR_TOO_MANY_PHY_ERRORS, 221 CARL9170_RR_LOST_RSP, 222 CARL9170_RR_INVALID_RSP, 223 CARL9170_RR_USER_REQUEST, 224 225 __CARL9170_RR_LAST, 226 }; 227 228 enum carl9170_erp_modes { 229 CARL9170_ERP_INVALID, 230 CARL9170_ERP_AUTO, 231 CARL9170_ERP_MAC80211, 232 CARL9170_ERP_OFF, 233 CARL9170_ERP_CTS, 234 CARL9170_ERP_RTS, 235 __CARL9170_ERP_NUM, 236 }; 237 238 struct ar9170 { 239 struct ath_common common; 240 struct ieee80211_hw *hw; 241 struct mutex mutex; 242 enum carl9170_device_state state; 243 spinlock_t state_lock; 244 enum carl9170_restart_reasons last_reason; 245 bool registered; 246 247 /* USB */ 248 struct usb_device *udev; 249 struct usb_interface *intf; 250 struct usb_anchor rx_anch; 251 struct usb_anchor rx_work; 252 struct usb_anchor rx_pool; 253 struct usb_anchor tx_wait; 254 struct usb_anchor tx_anch; 255 struct usb_anchor tx_cmd; 256 struct usb_anchor tx_err; 257 struct tasklet_struct usb_tasklet; 258 atomic_t tx_cmd_urbs; 259 atomic_t tx_anch_urbs; 260 atomic_t rx_anch_urbs; 261 atomic_t rx_work_urbs; 262 atomic_t rx_pool_urbs; 263 kernel_ulong_t features; 264 265 /* firmware settings */ 266 struct completion fw_load_wait; 267 struct completion fw_boot_wait; 268 struct { 269 const struct carl9170fw_desc_head *desc; 270 const struct firmware *fw; 271 unsigned int offset; 272 unsigned int address; 273 unsigned int cmd_bufs; 274 unsigned int api_version; 275 unsigned int vif_num; 276 unsigned int err_counter; 277 unsigned int bug_counter; 278 u32 beacon_addr; 279 unsigned int beacon_max_len; 280 bool rx_stream; 281 bool tx_stream; 282 bool rx_filter; 283 unsigned int mem_blocks; 284 unsigned int mem_block_size; 285 unsigned int rx_size; 286 } fw; 287 288 /* reset / stuck frames/queue detection */ 289 struct work_struct restart_work; 290 unsigned int restart_counter; 291 unsigned long queue_stop_timeout[__AR9170_NUM_TXQ]; 292 unsigned long max_queue_stop_timeout[__AR9170_NUM_TXQ]; 293 bool needs_full_reset; 294 atomic_t pending_restarts; 295 296 /* interface mode settings */ 297 struct list_head vif_list; 298 unsigned long vif_bitmap; 299 unsigned int vifs; 300 struct carl9170_vif vif_priv[AR9170_MAX_VIRTUAL_MAC]; 301 302 /* beaconing */ 303 spinlock_t beacon_lock; 304 unsigned int global_pretbtt; 305 unsigned int global_beacon_int; 306 struct carl9170_vif_info *beacon_iter; 307 unsigned int beacon_enabled; 308 309 /* cryptographic engine */ 310 u64 usedkeys; 311 bool rx_software_decryption; 312 bool disable_offload; 313 314 /* filter settings */ 315 u64 cur_mc_hash; 316 u32 cur_filter; 317 unsigned int filter_state; 318 unsigned int rx_filter_caps; 319 bool sniffer_enabled; 320 321 /* MAC */ 322 enum carl9170_erp_modes erp_mode; 323 324 /* PHY */ 325 struct ieee80211_channel *channel; 326 int noise[4]; 327 unsigned int chan_fail; 328 unsigned int total_chan_fail; 329 u8 heavy_clip; 330 u8 ht_settings; 331 332 /* power calibration data */ 333 u8 power_5G_leg[4]; 334 u8 power_2G_cck[4]; 335 u8 power_2G_ofdm[4]; 336 u8 power_5G_ht20[8]; 337 u8 power_5G_ht40[8]; 338 u8 power_2G_ht20[8]; 339 u8 power_2G_ht40[8]; 340 341 #ifdef CONFIG_CARL9170_LEDS 342 /* LED */ 343 struct delayed_work led_work; 344 struct carl9170_led leds[AR9170_NUM_LEDS]; 345 #endif /* CONFIG_CARL9170_LEDS */ 346 347 /* qos queue settings */ 348 spinlock_t tx_stats_lock; 349 struct carl9170_tx_queue_stats tx_stats[__AR9170_NUM_TXQ]; 350 struct ieee80211_tx_queue_params edcf[5]; 351 struct completion tx_flush; 352 353 /* CMD */ 354 int cmd_seq; 355 int readlen; 356 u8 *readbuf; 357 spinlock_t cmd_lock; 358 struct completion cmd_wait; 359 union { 360 __le32 cmd_buf[PAYLOAD_MAX + 1]; 361 struct carl9170_cmd cmd; 362 struct carl9170_rsp rsp; 363 }; 364 365 /* statistics */ 366 unsigned int tx_dropped; 367 unsigned int tx_ack_failures; 368 unsigned int tx_fcs_errors; 369 unsigned int rx_dropped; 370 371 /* EEPROM */ 372 struct ar9170_eeprom eeprom; 373 374 /* tx queuing */ 375 struct sk_buff_head tx_pending[__AR9170_NUM_TXQ]; 376 struct sk_buff_head tx_status[__AR9170_NUM_TXQ]; 377 struct delayed_work tx_janitor; 378 unsigned long tx_janitor_last_run; 379 bool tx_schedule; 380 381 /* tx ampdu */ 382 struct work_struct ampdu_work; 383 spinlock_t tx_ampdu_list_lock; 384 struct carl9170_sta_tid *tx_ampdu_iter; 385 struct list_head tx_ampdu_list; 386 atomic_t tx_ampdu_upload; 387 atomic_t tx_ampdu_scheduler; 388 atomic_t tx_total_pending; 389 atomic_t tx_total_queued; 390 unsigned int tx_ampdu_list_len; 391 int current_density; 392 int current_factor; 393 bool tx_ampdu_schedule; 394 395 /* internal memory management */ 396 spinlock_t mem_lock; 397 unsigned long *mem_bitmap; 398 atomic_t mem_free_blocks; 399 atomic_t mem_allocs; 400 401 /* rxstream mpdu merge */ 402 struct ar9170_rx_head rx_plcp; 403 bool rx_has_plcp; 404 struct sk_buff *rx_failover; 405 int rx_failover_missing; 406 407 #ifdef CONFIG_CARL9170_WPC 408 struct { 409 bool pbc_state; 410 struct input_dev *pbc; 411 char name[32]; 412 char phys[32]; 413 } wps; 414 #endif /* CONFIG_CARL9170_WPC */ 415 416 #ifdef CONFIG_CARL9170_DEBUGFS 417 struct carl9170_debug debug; 418 struct dentry *debug_dir; 419 #endif /* CONFIG_CARL9170_DEBUGFS */ 420 421 /* PSM */ 422 struct work_struct ps_work; 423 struct { 424 unsigned int dtim_counter; 425 unsigned long last_beacon; 426 unsigned long last_action; 427 unsigned long last_slept; 428 unsigned int sleep_ms; 429 unsigned int off_override; 430 bool state; 431 } ps; 432 }; 433 434 enum carl9170_ps_off_override_reasons { 435 PS_OFF_VIF = BIT(0), 436 PS_OFF_BCN = BIT(1), 437 PS_OFF_5GHZ = BIT(2), 438 }; 439 440 struct carl9170_ba_stats { 441 u8 ampdu_len; 442 u8 ampdu_ack_len; 443 bool clear; 444 }; 445 446 struct carl9170_sta_info { 447 bool ht_sta; 448 unsigned int ampdu_max_len; 449 struct carl9170_sta_tid *agg[CARL9170_NUM_TID]; 450 struct carl9170_ba_stats stats[CARL9170_NUM_TID]; 451 }; 452 453 struct carl9170_tx_info { 454 unsigned long timeout; 455 struct ar9170 *ar; 456 struct kref ref; 457 }; 458 459 #define CHK_DEV_STATE(a, s) (((struct ar9170 *)a)->state >= (s)) 460 #define IS_INITIALIZED(a) (CHK_DEV_STATE(a, CARL9170_STOPPED)) 461 #define IS_ACCEPTING_CMD(a) (CHK_DEV_STATE(a, CARL9170_IDLE)) 462 #define IS_STARTED(a) (CHK_DEV_STATE(a, CARL9170_STARTED)) 463 464 static inline void __carl9170_set_state(struct ar9170 *ar, 465 enum carl9170_device_state newstate) 466 { 467 ar->state = newstate; 468 } 469 470 static inline void carl9170_set_state(struct ar9170 *ar, 471 enum carl9170_device_state newstate) 472 { 473 unsigned long flags; 474 475 spin_lock_irqsave(&ar->state_lock, flags); 476 __carl9170_set_state(ar, newstate); 477 spin_unlock_irqrestore(&ar->state_lock, flags); 478 } 479 480 static inline void carl9170_set_state_when(struct ar9170 *ar, 481 enum carl9170_device_state min, enum carl9170_device_state newstate) 482 { 483 unsigned long flags; 484 485 spin_lock_irqsave(&ar->state_lock, flags); 486 if (CHK_DEV_STATE(ar, min)) 487 __carl9170_set_state(ar, newstate); 488 spin_unlock_irqrestore(&ar->state_lock, flags); 489 } 490 491 /* exported interface */ 492 void *carl9170_alloc(size_t priv_size); 493 int carl9170_register(struct ar9170 *ar); 494 void carl9170_unregister(struct ar9170 *ar); 495 void carl9170_free(struct ar9170 *ar); 496 void carl9170_restart(struct ar9170 *ar, const enum carl9170_restart_reasons r); 497 void carl9170_ps_check(struct ar9170 *ar); 498 499 /* USB back-end */ 500 int carl9170_usb_open(struct ar9170 *ar); 501 void carl9170_usb_stop(struct ar9170 *ar); 502 void carl9170_usb_tx(struct ar9170 *ar, struct sk_buff *skb); 503 void carl9170_usb_handle_tx_err(struct ar9170 *ar); 504 int carl9170_exec_cmd(struct ar9170 *ar, const enum carl9170_cmd_oids, 505 u32 plen, void *payload, u32 rlen, void *resp); 506 int __carl9170_exec_cmd(struct ar9170 *ar, struct carl9170_cmd *cmd, 507 const bool free_buf); 508 int carl9170_usb_restart(struct ar9170 *ar); 509 void carl9170_usb_reset(struct ar9170 *ar); 510 511 /* MAC */ 512 int carl9170_init_mac(struct ar9170 *ar); 513 int carl9170_set_qos(struct ar9170 *ar); 514 int carl9170_update_multicast(struct ar9170 *ar, const u64 mc_hast); 515 int carl9170_mod_virtual_mac(struct ar9170 *ar, const unsigned int id, 516 const u8 *mac); 517 int carl9170_set_operating_mode(struct ar9170 *ar); 518 int carl9170_set_beacon_timers(struct ar9170 *ar); 519 int carl9170_set_dyn_sifs_ack(struct ar9170 *ar); 520 int carl9170_set_rts_cts_rate(struct ar9170 *ar); 521 int carl9170_set_ampdu_settings(struct ar9170 *ar); 522 int carl9170_set_slot_time(struct ar9170 *ar); 523 int carl9170_set_mac_rates(struct ar9170 *ar); 524 int carl9170_set_hwretry_limit(struct ar9170 *ar, const u32 max_retry); 525 int carl9170_update_beacon(struct ar9170 *ar, const bool submit); 526 int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac, 527 const u8 ktype, const u8 keyidx, const u8 *keydata, const int keylen); 528 int carl9170_disable_key(struct ar9170 *ar, const u8 id); 529 530 /* RX */ 531 void carl9170_rx(struct ar9170 *ar, void *buf, unsigned int len); 532 void carl9170_handle_command_response(struct ar9170 *ar, void *buf, u32 len); 533 534 /* TX */ 535 int carl9170_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb); 536 void carl9170_tx_janitor(struct work_struct *work); 537 void carl9170_tx_process_status(struct ar9170 *ar, 538 const struct carl9170_rsp *cmd); 539 void carl9170_tx_status(struct ar9170 *ar, struct sk_buff *skb, 540 const bool success); 541 void carl9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb); 542 void carl9170_tx_drop(struct ar9170 *ar, struct sk_buff *skb); 543 void carl9170_tx_scheduler(struct ar9170 *ar); 544 void carl9170_tx_get_skb(struct sk_buff *skb); 545 int carl9170_tx_put_skb(struct sk_buff *skb); 546 547 /* LEDs */ 548 #ifdef CONFIG_CARL9170_LEDS 549 int carl9170_led_register(struct ar9170 *ar); 550 void carl9170_led_unregister(struct ar9170 *ar); 551 #endif /* CONFIG_CARL9170_LEDS */ 552 int carl9170_led_init(struct ar9170 *ar); 553 int carl9170_led_set_state(struct ar9170 *ar, const u32 led_state); 554 555 /* PHY / RF */ 556 int carl9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel, 557 enum nl80211_channel_type bw, enum carl9170_rf_init_mode rfi); 558 int carl9170_get_noisefloor(struct ar9170 *ar); 559 560 /* FW */ 561 int carl9170_parse_firmware(struct ar9170 *ar); 562 int carl9170_fw_fix_eeprom(struct ar9170 *ar); 563 564 extern struct ieee80211_rate __carl9170_ratetable[]; 565 extern int modparam_noht; 566 567 static inline struct ar9170 *carl9170_get_priv(struct carl9170_vif *carl_vif) 568 { 569 return container_of(carl_vif, struct ar9170, 570 vif_priv[carl_vif->id]); 571 } 572 573 static inline struct ieee80211_hdr *carl9170_get_hdr(struct sk_buff *skb) 574 { 575 return (void *)((struct _carl9170_tx_superframe *) 576 skb->data)->frame_data; 577 } 578 579 static inline u16 get_seq_h(struct ieee80211_hdr *hdr) 580 { 581 return le16_to_cpu(hdr->seq_ctrl) >> 4; 582 } 583 584 static inline u16 carl9170_get_seq(struct sk_buff *skb) 585 { 586 return get_seq_h(carl9170_get_hdr(skb)); 587 } 588 589 static inline u16 get_tid_h(struct ieee80211_hdr *hdr) 590 { 591 return (ieee80211_get_qos_ctl(hdr))[0] & IEEE80211_QOS_CTL_TID_MASK; 592 } 593 594 static inline u16 carl9170_get_tid(struct sk_buff *skb) 595 { 596 return get_tid_h(carl9170_get_hdr(skb)); 597 } 598 599 static inline struct ieee80211_vif * 600 carl9170_get_vif(struct carl9170_vif_info *priv) 601 { 602 return container_of((void *)priv, struct ieee80211_vif, drv_priv); 603 } 604 605 /* Protected by ar->mutex or RCU */ 606 static inline struct ieee80211_vif *carl9170_get_main_vif(struct ar9170 *ar) 607 { 608 struct carl9170_vif_info *cvif; 609 610 list_for_each_entry_rcu(cvif, &ar->vif_list, list) { 611 if (cvif->active) 612 return carl9170_get_vif(cvif); 613 } 614 615 return NULL; 616 } 617 618 static inline bool is_main_vif(struct ar9170 *ar, struct ieee80211_vif *vif) 619 { 620 bool ret; 621 622 rcu_read_lock(); 623 ret = (carl9170_get_main_vif(ar) == vif); 624 rcu_read_unlock(); 625 return ret; 626 } 627 628 #endif /* __CARL9170_H */

1 2 /* 3 * Atheros CARL9170 driver 4 * 5 * mac80211 interaction code 6 * 7 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 8 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; see the file COPYING. If not, see 22 * http://www.gnu.org/licenses/. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * Copyright (c) 2007-2008 Atheros Communications, Inc. 27 * 28 * Permission to use, copy, modify, and/or distribute this software for any 29 * purpose with or without fee is hereby granted, provided that the above 30 * copyright notice and this permission notice appear in all copies. 31 * 32 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 33 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 34 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 35 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 36 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 37 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 38 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 39 */ 40 41 #include <linux/init.h> 42 #include <linux/slab.h> 43 #include <linux/module.h> 44 #include <linux/etherdevice.h> 45 #include <linux/random.h> 46 #include <net/mac80211.h> 47 #include <net/cfg80211.h> 48 #include "hw.h" 49 #include "carl9170.h" 50 #include "cmd.h" 51 52 static int modparam_nohwcrypt; 53 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 54 MODULE_PARM_DESC(nohwcrypt, "Disable hardware crypto offload."); 55 56 int modparam_noht; 57 module_param_named(noht, modparam_noht, int, S_IRUGO); 58 MODULE_PARM_DESC(noht, "Disable MPDU aggregation."); 59 60 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 61 .bitrate = (_bitrate), \ 62 .flags = (_flags), \ 63 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 64 } 65 66 struct ieee80211_rate __carl9170_ratetable[] = { 67 RATE(10, 0, 0, 0), 68 RATE(20, 1, 1, IEEE80211_RATE_SHORT_PREAMBLE), 69 RATE(55, 2, 2, IEEE80211_RATE_SHORT_PREAMBLE), 70 RATE(110, 3, 3, IEEE80211_RATE_SHORT_PREAMBLE), 71 RATE(60, 0xb, 0, 0), 72 RATE(90, 0xf, 0, 0), 73 RATE(120, 0xa, 0, 0), 74 RATE(180, 0xe, 0, 0), 75 RATE(240, 0x9, 0, 0), 76 RATE(360, 0xd, 1, 0), 77 RATE(480, 0x8, 2, 0), 78 RATE(540, 0xc, 3, 0), 79 }; 80 #undef RATE 81 82 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 83 #define carl9170_g_ratetable_size 12 84 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 85 #define carl9170_a_ratetable_size 8 86 87 /* 88 * NB: The hw_value is used as an index into the carl9170_phy_freq_params 89 * array in phy.c so that we don't have to do frequency lookups! 90 */ 91 #define CHAN(_freq, _idx) { \ 92 .center_freq = (_freq), \ 93 .hw_value = (_idx), \ 94 .max_power = 18, /* XXX */ \ 95 } 96 97 static struct ieee80211_channel carl9170_2ghz_chantable[] = { 98 CHAN(2412, 0), 99 CHAN(2417, 1), 100 CHAN(2422, 2), 101 CHAN(2427, 3), 102 CHAN(2432, 4), 103 CHAN(2437, 5), 104 CHAN(2442, 6), 105 CHAN(2447, 7), 106 CHAN(2452, 8), 107 CHAN(2457, 9), 108 CHAN(2462, 10), 109 CHAN(2467, 11), 110 CHAN(2472, 12), 111 CHAN(2484, 13), 112 }; 113 114 static struct ieee80211_channel carl9170_5ghz_chantable[] = { 115 CHAN(4920, 14), 116 CHAN(4940, 15), 117 CHAN(4960, 16), 118 CHAN(4980, 17), 119 CHAN(5040, 18), 120 CHAN(5060, 19), 121 CHAN(5080, 20), 122 CHAN(5180, 21), 123 CHAN(5200, 22), 124 CHAN(5220, 23), 125 CHAN(5240, 24), 126 CHAN(5260, 25), 127 CHAN(5280, 26), 128 CHAN(5300, 27), 129 CHAN(5320, 28), 130 CHAN(5500, 29), 131 CHAN(5520, 30), 132 CHAN(5540, 31), 133 CHAN(5560, 32), 134 CHAN(5580, 33), 135 CHAN(5600, 34), 136 CHAN(5620, 35), 137 CHAN(5640, 36), 138 CHAN(5660, 37), 139 CHAN(5680, 38), 140 CHAN(5700, 39), 141 CHAN(5745, 40), 142 CHAN(5765, 41), 143 CHAN(5785, 42), 144 CHAN(5805, 43), 145 CHAN(5825, 44), 146 CHAN(5170, 45), 147 CHAN(5190, 46), 148 CHAN(5210, 47), 149 CHAN(5230, 48), 150 }; 151 #undef CHAN 152 153 #define CARL9170_HT_CAP \ 154 { \ 155 .ht_supported = true, \ 156 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 157 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 158 IEEE80211_HT_CAP_SGI_40 | \ 159 IEEE80211_HT_CAP_DSSSCCK40 | \ 160 IEEE80211_HT_CAP_SM_PS, \ 161 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 162 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 163 .mcs = { \ 164 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 165 .rx_highest = cpu_to_le16(300), \ 166 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 167 }, \ 168 } 169 170 static struct ieee80211_supported_band carl9170_band_2GHz = { 171 .channels = carl9170_2ghz_chantable, 172 .n_channels = ARRAY_SIZE(carl9170_2ghz_chantable), 173 .bitrates = carl9170_g_ratetable, 174 .n_bitrates = carl9170_g_ratetable_size, 175 .ht_cap = CARL9170_HT_CAP, 176 }; 177 178 static struct ieee80211_supported_band carl9170_band_5GHz = { 179 .channels = carl9170_5ghz_chantable, 180 .n_channels = ARRAY_SIZE(carl9170_5ghz_chantable), 181 .bitrates = carl9170_a_ratetable, 182 .n_bitrates = carl9170_a_ratetable_size, 183 .ht_cap = CARL9170_HT_CAP, 184 }; 185 186 static void carl9170_ampdu_gc(struct ar9170 *ar) 187 { 188 struct carl9170_sta_tid *tid_info; 189 LIST_HEAD(tid_gc); 190 191 rcu_read_lock(); 192 list_for_each_entry_rcu(tid_info, &ar->tx_ampdu_list, list) { 193 spin_lock_bh(&ar->tx_ampdu_list_lock); 194 if (tid_info->state == CARL9170_TID_STATE_SHUTDOWN) { 195 tid_info->state = CARL9170_TID_STATE_KILLED; 196 list_del_rcu(&tid_info->list); 197 ar->tx_ampdu_list_len--; 198 list_add_tail(&tid_info->tmp_list, &tid_gc); 199 } 200 spin_unlock_bh(&ar->tx_ampdu_list_lock); 201 202 } 203 rcu_assign_pointer(ar->tx_ampdu_iter, tid_info); 204 rcu_read_unlock(); 205 206 synchronize_rcu(); 207 208 while (!list_empty(&tid_gc)) { 209 struct sk_buff *skb; 210 tid_info = list_first_entry(&tid_gc, struct carl9170_sta_tid, 211 tmp_list); 212 213 while ((skb = __skb_dequeue(&tid_info->queue))) 214 carl9170_tx_status(ar, skb, false); 215 216 list_del_init(&tid_info->tmp_list); 217 kfree(tid_info); 218 } 219 } 220 221 static void carl9170_flush(struct ar9170 *ar, bool drop_queued) 222 { 223 if (drop_queued) { 224 int i; 225 226 /* 227 * We can only drop frames which have not been uploaded 228 * to the device yet. 229 */ 230 231 for (i = 0; i < ar->hw->queues; i++) { 232 struct sk_buff *skb; 233 234 while ((skb = skb_dequeue(&ar->tx_pending[i]))) { 235 struct ieee80211_tx_info *info; 236 237 info = IEEE80211_SKB_CB(skb); 238 if (info->flags & IEEE80211_TX_CTL_AMPDU) 239 atomic_dec(&ar->tx_ampdu_upload); 240 241 carl9170_tx_status(ar, skb, false); 242 } 243 } 244 } 245 246 /* Wait for all other outstanding frames to timeout. */ 247 if (atomic_read(&ar->tx_total_queued)) 248 WARN_ON(wait_for_completion_timeout(&ar->tx_flush, HZ) == 0); 249 } 250 251 static void carl9170_flush_ba(struct ar9170 *ar) 252 { 253 struct sk_buff_head free; 254 struct carl9170_sta_tid *tid_info; 255 struct sk_buff *skb; 256 257 __skb_queue_head_init(&free); 258 259 rcu_read_lock(); 260 spin_lock_bh(&ar->tx_ampdu_list_lock); 261 list_for_each_entry_rcu(tid_info, &ar->tx_ampdu_list, list) { 262 if (tid_info->state > CARL9170_TID_STATE_SUSPEND) { 263 tid_info->state = CARL9170_TID_STATE_SUSPEND; 264 265 spin_lock(&tid_info->lock); 266 while ((skb = __skb_dequeue(&tid_info->queue))) 267 __skb_queue_tail(&free, skb); 268 spin_unlock(&tid_info->lock); 269 } 270 } 271 spin_unlock_bh(&ar->tx_ampdu_list_lock); 272 rcu_read_unlock(); 273 274 while ((skb = __skb_dequeue(&free))) 275 carl9170_tx_status(ar, skb, false); 276 } 277 278 static void carl9170_zap_queues(struct ar9170 *ar) 279 { 280 struct carl9170_vif_info *cvif; 281 unsigned int i; 282 283 carl9170_ampdu_gc(ar); 284 285 carl9170_flush_ba(ar); 286 carl9170_flush(ar, true); 287 288 for (i = 0; i < ar->hw->queues; i++) { 289 spin_lock_bh(&ar->tx_status[i].lock); 290 while (!skb_queue_empty(&ar->tx_status[i])) { 291 struct sk_buff *skb; 292 293 skb = skb_peek(&ar->tx_status[i]); 294 carl9170_tx_get_skb(skb); 295 spin_unlock_bh(&ar->tx_status[i].lock); 296 carl9170_tx_drop(ar, skb); 297 spin_lock_bh(&ar->tx_status[i].lock); 298 carl9170_tx_put_skb(skb); 299 } 300 spin_unlock_bh(&ar->tx_status[i].lock); 301 } 302 303 BUILD_BUG_ON(CARL9170_NUM_TX_LIMIT_SOFT < 1); 304 BUILD_BUG_ON(CARL9170_NUM_TX_LIMIT_HARD < CARL9170_NUM_TX_LIMIT_SOFT); 305 BUILD_BUG_ON(CARL9170_NUM_TX_LIMIT_HARD >= CARL9170_BAW_BITS); 306 307 /* reinitialize queues statistics */ 308 memset(&ar->tx_stats, 0, sizeof(ar->tx_stats)); 309 for (i = 0; i < ar->hw->queues; i++) 310 ar->tx_stats[i].limit = CARL9170_NUM_TX_LIMIT_HARD; 311 312 for (i = 0; i < DIV_ROUND_UP(ar->fw.mem_blocks, BITS_PER_LONG); i++) 313 ar->mem_bitmap[i] = 0; 314 315 rcu_read_lock(); 316 list_for_each_entry_rcu(cvif, &ar->vif_list, list) { 317 spin_lock_bh(&ar->beacon_lock); 318 dev_kfree_skb_any(cvif->beacon); 319 cvif->beacon = NULL; 320 spin_unlock_bh(&ar->beacon_lock); 321 } 322 rcu_read_unlock(); 323 324 atomic_set(&ar->tx_ampdu_upload, 0); 325 atomic_set(&ar->tx_ampdu_scheduler, 0); 326 atomic_set(&ar->tx_total_pending, 0); 327 atomic_set(&ar->tx_total_queued, 0); 328 atomic_set(&ar->mem_free_blocks, ar->fw.mem_blocks); 329 } 330 331 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 332 do { \ 333 queue.aifs = ai_fs; \ 334 queue.cw_min = cwmin; \ 335 queue.cw_max = cwmax; \ 336 queue.txop = _txop; \ 337 } while (0) 338 339 static int carl9170_op_start(struct ieee80211_hw *hw) 340 { 341 struct ar9170 *ar = hw->priv; 342 int err, i; 343 344 mutex_lock(&ar->mutex); 345 346 carl9170_zap_queues(ar); 347 348 /* reset QoS defaults */ 349 CARL9170_FILL_QUEUE(ar->edcf[0], 3, 15, 1023, 0); /* BEST EFFORT */ 350 CARL9170_FILL_QUEUE(ar->edcf[1], 2, 7, 15, 94); /* VIDEO */ 351 CARL9170_FILL_QUEUE(ar->edcf[2], 2, 3, 7, 47); /* VOICE */ 352 CARL9170_FILL_QUEUE(ar->edcf[3], 7, 15, 1023, 0); /* BACKGROUND */ 353 CARL9170_FILL_QUEUE(ar->edcf[4], 2, 3, 7, 0); /* SPECIAL */ 354 355 ar->current_factor = ar->current_density = -1; 356 /* "The first key is unique." */ 357 ar->usedkeys = 1; 358 ar->filter_state = 0; 359 ar->ps.last_action = jiffies; 360 ar->ps.last_slept = jiffies; 361 ar->erp_mode = CARL9170_ERP_AUTO; 362 ar->rx_software_decryption = false; 363 ar->disable_offload = false; 364 365 for (i = 0; i < ar->hw->queues; i++) { 366 ar->queue_stop_timeout[i] = jiffies; 367 ar->max_queue_stop_timeout[i] = 0; 368 } 369 370 atomic_set(&ar->mem_allocs, 0); 371 372 err = carl9170_usb_open(ar); 373 if (err) 374 goto out; 375 376 err = carl9170_init_mac(ar); 377 if (err) 378 goto out; 379 380 err = carl9170_set_qos(ar); 381 if (err) 382 goto out; 383 384 if (ar->fw.rx_filter) { 385 err = carl9170_rx_filter(ar, CARL9170_RX_FILTER_OTHER_RA | 386 CARL9170_RX_FILTER_CTL_OTHER | CARL9170_RX_FILTER_BAD); 387 if (err) 388 goto out; 389 } 390 391 err = carl9170_write_reg(ar, AR9170_MAC_REG_DMA_TRIGGER, 392 AR9170_DMA_TRIGGER_RXQ); 393 if (err) 394 goto out; 395 396 /* Clear key-cache */ 397 for (i = 0; i < AR9170_CAM_MAX_USER + 4; i++) { 398 err = carl9170_upload_key(ar, i, NULL, AR9170_ENC_ALG_NONE, 399 0, NULL, 0); 400 if (err) 401 goto out; 402 403 err = carl9170_upload_key(ar, i, NULL, AR9170_ENC_ALG_NONE, 404 1, NULL, 0); 405 if (err) 406 goto out; 407 408 if (i < AR9170_CAM_MAX_USER) { 409 err = carl9170_disable_key(ar, i); 410 if (err) 411 goto out; 412 } 413 } 414 415 carl9170_set_state_when(ar, CARL9170_IDLE, CARL9170_STARTED); 416 417 ieee80211_wake_queues(ar->hw); 418 err = 0; 419 420 out: 421 mutex_unlock(&ar->mutex); 422 return err; 423 } 424 425 static void carl9170_cancel_worker(struct ar9170 *ar) 426 { 427 cancel_delayed_work_sync(&ar->tx_janitor); 428 #ifdef CONFIG_CARL9170_LEDS 429 cancel_delayed_work_sync(&ar->led_work); 430 #endif /* CONFIG_CARL9170_LEDS */ 431 cancel_work_sync(&ar->ps_work); 432 cancel_work_sync(&ar->ampdu_work); 433 } 434 435 static void carl9170_op_stop(struct ieee80211_hw *hw) 436 { 437 struct ar9170 *ar = hw->priv; 438 439 carl9170_set_state_when(ar, CARL9170_STARTED, CARL9170_IDLE); 440 441 ieee80211_stop_queues(ar->hw); 442 443 mutex_lock(&ar->mutex); 444 if (IS_ACCEPTING_CMD(ar)) { 445 rcu_assign_pointer(ar->beacon_iter, NULL); 446 447 carl9170_led_set_state(ar, 0); 448 449 /* stop DMA */ 450 carl9170_write_reg(ar, AR9170_MAC_REG_DMA_TRIGGER, 0); 451 carl9170_usb_stop(ar); 452 } 453 454 carl9170_zap_queues(ar); 455 mutex_unlock(&ar->mutex); 456 457 carl9170_cancel_worker(ar); 458 } 459 460 static void carl9170_restart_work(struct work_struct *work) 461 { 462 struct ar9170 *ar = container_of(work, struct ar9170, 463 restart_work); 464 int err; 465 466 ar->usedkeys = 0; 467 ar->filter_state = 0; 468 carl9170_cancel_worker(ar); 469 470 mutex_lock(&ar->mutex); 471 err = carl9170_usb_restart(ar); 472 if (net_ratelimit()) { 473 if (err) { 474 dev_err(&ar->udev->dev, "Failed to restart device " 475 " (%d).\n", err); 476 } else { 477 dev_info(&ar->udev->dev, "device restarted " 478 "successfully.\n"); 479 } 480 } 481 482 carl9170_zap_queues(ar); 483 mutex_unlock(&ar->mutex); 484 if (!err) { 485 ar->restart_counter++; 486 atomic_set(&ar->pending_restarts, 0); 487 488 ieee80211_restart_hw(ar->hw); 489 } else { 490 /* 491 * The reset was unsuccessful and the device seems to 492 * be dead. But there's still one option: a low-level 493 * usb subsystem reset... 494 */ 495 496 carl9170_usb_reset(ar); 497 } 498 } 499 500 void carl9170_restart(struct ar9170 *ar, const enum carl9170_restart_reasons r) 501 { 502 carl9170_set_state_when(ar, CARL9170_STARTED, CARL9170_IDLE); 503 504 /* 505 * Sometimes, an error can trigger several different reset events. 506 * By ignoring these *surplus* reset events, the device won't be 507 * killed again, right after it has recovered. 508 */ 509 if (atomic_inc_return(&ar->pending_restarts) > 1) { 510 dev_dbg(&ar->udev->dev, "ignoring restart (%d)\n", r); 511 return; 512 } 513 514 ieee80211_stop_queues(ar->hw); 515 516 dev_err(&ar->udev->dev, "restart device (%d)\n", r); 517 518 if (!WARN_ON(r == CARL9170_RR_NO_REASON) || 519 !WARN_ON(r >= __CARL9170_RR_LAST)) 520 ar->last_reason = r; 521 522 if (!ar->registered) 523 return; 524 525 if (IS_ACCEPTING_CMD(ar) && !ar->needs_full_reset) 526 ieee80211_queue_work(ar->hw, &ar->restart_work); 527 else 528 carl9170_usb_reset(ar); 529 530 /* 531 * At this point, the device instance might have vanished/disabled. 532 * So, don't put any code which access the ar9170 struct 533 * without proper protection. 534 */ 535 } 536 537 static int carl9170_init_interface(struct ar9170 *ar, 538 struct ieee80211_vif *vif) 539 { 540 struct ath_common *common = &ar->common; 541 int err; 542 543 if (!vif) { 544 WARN_ON_ONCE(IS_STARTED(ar)); 545 return 0; 546 } 547 548 memcpy(common->macaddr, vif->addr, ETH_ALEN); 549 550 if (modparam_nohwcrypt || 551 ((vif->type != NL80211_IFTYPE_STATION) && 552 (vif->type != NL80211_IFTYPE_AP))) { 553 ar->rx_software_decryption = true; 554 ar->disable_offload = true; 555 } 556 557 err = carl9170_set_operating_mode(ar); 558 return err; 559 } 560 561 static int carl9170_op_add_interface(struct ieee80211_hw *hw, 562 struct ieee80211_vif *vif) 563 { 564 struct carl9170_vif_info *vif_priv = (void *) vif->drv_priv; 565 struct ieee80211_vif *main_vif; 566 struct ar9170 *ar = hw->priv; 567 int vif_id = -1, err = 0; 568 569 mutex_lock(&ar->mutex); 570 rcu_read_lock(); 571 if (vif_priv->active) { 572 /* 573 * Skip the interface structure initialization, 574 * if the vif survived the _restart call. 575 */ 576 vif_id = vif_priv->id; 577 vif_priv->enable_beacon = false; 578 579 spin_lock_bh(&ar->beacon_lock); 580 dev_kfree_skb_any(vif_priv->beacon); 581 vif_priv->beacon = NULL; 582 spin_unlock_bh(&ar->beacon_lock); 583 584 goto init; 585 } 586 587 main_vif = carl9170_get_main_vif(ar); 588 589 if (main_vif) { 590 switch (main_vif->type) { 591 case NL80211_IFTYPE_STATION: 592 if (vif->type == NL80211_IFTYPE_STATION) 593 break; 594 595 err = -EBUSY; 596 rcu_read_unlock(); 597 598 goto unlock; 599 600 case NL80211_IFTYPE_AP: 601 if ((vif->type == NL80211_IFTYPE_STATION) || 602 (vif->type == NL80211_IFTYPE_WDS) || 603 (vif->type == NL80211_IFTYPE_AP)) 604 break; 605 606 err = -EBUSY; 607 rcu_read_unlock(); 608 goto unlock; 609 610 default: 611 rcu_read_unlock(); 612 goto unlock; 613 } 614 } 615 616 vif_id = bitmap_find_free_region(&ar->vif_bitmap, ar->fw.vif_num, 0); 617 618 if (vif_id < 0) { 619 rcu_read_unlock(); 620 621 err = -ENOSPC; 622 goto unlock; 623 } 624 625 BUG_ON(ar->vif_priv[vif_id].id != vif_id); 626 627 vif_priv->active = true; 628 vif_priv->id = vif_id; 629 vif_priv->enable_beacon = false; 630 ar->vifs++; 631 list_add_tail_rcu(&vif_priv->list, &ar->vif_list); 632 rcu_assign_pointer(ar->vif_priv[vif_id].vif, vif); 633 634 init: 635 if (carl9170_get_main_vif(ar) == vif) { 636 rcu_assign_pointer(ar->beacon_iter, vif_priv); 637 rcu_read_unlock(); 638 639 err = carl9170_init_interface(ar, vif); 640 if (err) 641 goto unlock; 642 } else { 643 rcu_read_unlock(); 644 err = carl9170_mod_virtual_mac(ar, vif_id, vif->addr); 645 646 if (err) 647 goto unlock; 648 } 649 650 unlock: 651 if (err && (vif_id >= 0)) { 652 vif_priv->active = false; 653 bitmap_release_region(&ar->vif_bitmap, vif_id, 0); 654 ar->vifs--; 655 rcu_assign_pointer(ar->vif_priv[vif_id].vif, NULL); 656 list_del_rcu(&vif_priv->list); 657 mutex_unlock(&ar->mutex); 658 synchronize_rcu(); 659 } else { 660 if (ar->vifs > 1) 661 ar->ps.off_override |= PS_OFF_VIF; 662 663 mutex_unlock(&ar->mutex); 664 } 665 666 return err; 667 } 668 669 static void carl9170_op_remove_interface(struct ieee80211_hw *hw, 670 struct ieee80211_vif *vif) 671 { 672 struct carl9170_vif_info *vif_priv = (void *) vif->drv_priv; 673 struct ieee80211_vif *main_vif; 674 struct ar9170 *ar = hw->priv; 675 unsigned int id; 676 677 mutex_lock(&ar->mutex); 678 679 if (WARN_ON_ONCE(!vif_priv->active)) 680 goto unlock; 681 682 ar->vifs--; 683 684 rcu_read_lock(); 685 main_vif = carl9170_get_main_vif(ar); 686 687 id = vif_priv->id; 688 689 vif_priv->active = false; 690 WARN_ON(vif_priv->enable_beacon); 691 vif_priv->enable_beacon = false; 692 list_del_rcu(&vif_priv->list); 693 rcu_assign_pointer(ar->vif_priv[id].vif, NULL); 694 695 if (vif == main_vif) { 696 rcu_read_unlock(); 697 698 if (ar->vifs) { 699 WARN_ON(carl9170_init_interface(ar, 700 carl9170_get_main_vif(ar))); 701 } else { 702 carl9170_set_operating_mode(ar); 703 } 704 } else { 705 rcu_read_unlock(); 706 707 WARN_ON(carl9170_mod_virtual_mac(ar, id, NULL)); 708 } 709 710 carl9170_update_beacon(ar, false); 711 carl9170_flush_cab(ar, id); 712 713 spin_lock_bh(&ar->beacon_lock); 714 dev_kfree_skb_any(vif_priv->beacon); 715 vif_priv->beacon = NULL; 716 spin_unlock_bh(&ar->beacon_lock); 717 718 bitmap_release_region(&ar->vif_bitmap, id, 0); 719 720 carl9170_set_beacon_timers(ar); 721 722 if (ar->vifs == 1) 723 ar->ps.off_override &= ~PS_OFF_VIF; 724 725 unlock: 726 mutex_unlock(&ar->mutex); 727 728 synchronize_rcu(); 729 } 730 731 void carl9170_ps_check(struct ar9170 *ar) 732 { 733 ieee80211_queue_work(ar->hw, &ar->ps_work); 734 } 735 736 /* caller must hold ar->mutex */ 737 static int carl9170_ps_update(struct ar9170 *ar) 738 { 739 bool ps = false; 740 int err = 0; 741 742 if (!ar->ps.off_override) 743 ps = (ar->hw->conf.flags & IEEE80211_CONF_PS); 744 745 if (ps != ar->ps.state) { 746 err = carl9170_powersave(ar, ps); 747 if (err) 748 return err; 749 750 if (ar->ps.state && !ps) { 751 ar->ps.sleep_ms = jiffies_to_msecs(jiffies - 752 ar->ps.last_action); 753 } 754 755 if (ps) 756 ar->ps.last_slept = jiffies; 757 758 ar->ps.last_action = jiffies; 759 ar->ps.state = ps; 760 } 761 762 return 0; 763 } 764 765 static void carl9170_ps_work(struct work_struct *work) 766 { 767 struct ar9170 *ar = container_of(work, struct ar9170, 768 ps_work); 769 mutex_lock(&ar->mutex); 770 if (IS_STARTED(ar)) 771 WARN_ON_ONCE(carl9170_ps_update(ar) != 0); 772 mutex_unlock(&ar->mutex); 773 } 774 775 776 static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed) 777 { 778 struct ar9170 *ar = hw->priv; 779 int err = 0; 780 781 mutex_lock(&ar->mutex); 782 if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { 783 /* TODO */ 784 err = 0; 785 } 786 787 if (changed & IEEE80211_CONF_CHANGE_PS) { 788 err = carl9170_ps_update(ar); 789 if (err) 790 goto out; 791 } 792 793 if (changed & IEEE80211_CONF_CHANGE_POWER) { 794 /* TODO */ 795 err = 0; 796 } 797 798 if (changed & IEEE80211_CONF_CHANGE_SMPS) { 799 /* TODO */ 800 err = 0; 801 } 802 803 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 804 /* adjust slot time for 5 GHz */ 805 err = carl9170_set_slot_time(ar); 806 if (err) 807 goto out; 808 809 err = carl9170_set_channel(ar, hw->conf.channel, 810 hw->conf.channel_type, CARL9170_RFI_NONE); 811 if (err) 812 goto out; 813 814 err = carl9170_set_dyn_sifs_ack(ar); 815 if (err) 816 goto out; 817 818 err = carl9170_set_rts_cts_rate(ar); 819 if (err) 820 goto out; 821 } 822 823 out: 824 mutex_unlock(&ar->mutex); 825 return err; 826 } 827 828 static u64 carl9170_op_prepare_multicast(struct ieee80211_hw *hw, 829 struct netdev_hw_addr_list *mc_list) 830 { 831 struct netdev_hw_addr *ha; 832 u64 mchash; 833 834 /* always get broadcast frames */ 835 mchash = 1ULL << (0xff >> 2); 836 837 netdev_hw_addr_list_for_each(ha, mc_list) 838 mchash |= 1ULL << (ha->addr[5] >> 2); 839 840 return mchash; 841 } 842 843 static void carl9170_op_configure_filter(struct ieee80211_hw *hw, 844 unsigned int changed_flags, 845 unsigned int *new_flags, 846 u64 multicast) 847 { 848 struct ar9170 *ar = hw->priv; 849 850 /* mask supported flags */ 851 *new_flags &= FIF_ALLMULTI | ar->rx_filter_caps; 852 853 if (!IS_ACCEPTING_CMD(ar)) 854 return; 855 856 mutex_lock(&ar->mutex); 857 858 ar->filter_state = *new_flags; 859 /* 860 * We can support more by setting the sniffer bit and 861 * then checking the error flags, later. 862 */ 863 864 if (changed_flags & FIF_ALLMULTI && *new_flags & FIF_ALLMULTI) 865 multicast = ~0ULL; 866 867 if (multicast != ar->cur_mc_hash) 868 WARN_ON(carl9170_update_multicast(ar, multicast)); 869 870 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) { 871 ar->sniffer_enabled = !!(*new_flags & 872 (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)); 873 874 WARN_ON(carl9170_set_operating_mode(ar)); 875 } 876 877 if (ar->fw.rx_filter && changed_flags & ar->rx_filter_caps) { 878 u32 rx_filter = 0; 879 880 if (!(*new_flags & (FIF_FCSFAIL | FIF_PLCPFAIL))) 881 rx_filter |= CARL9170_RX_FILTER_BAD; 882 883 if (!(*new_flags & FIF_CONTROL)) 884 rx_filter |= CARL9170_RX_FILTER_CTL_OTHER; 885 886 if (!(*new_flags & FIF_PSPOLL)) 887 rx_filter |= CARL9170_RX_FILTER_CTL_PSPOLL; 888 889 if (!(*new_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))) { 890 rx_filter |= CARL9170_RX_FILTER_OTHER_RA; 891 rx_filter |= CARL9170_RX_FILTER_DECRY_FAIL; 892 } 893 894 WARN_ON(carl9170_rx_filter(ar, rx_filter)); 895 } 896 897 mutex_unlock(&ar->mutex); 898 } 899 900 901 static void carl9170_op_bss_info_changed(struct ieee80211_hw *hw, 902 struct ieee80211_vif *vif, 903 struct ieee80211_bss_conf *bss_conf, 904 u32 changed) 905 { 906 struct ar9170 *ar = hw->priv; 907 struct ath_common *common = &ar->common; 908 int err = 0; 909 struct carl9170_vif_info *vif_priv; 910 struct ieee80211_vif *main_vif; 911 912 mutex_lock(&ar->mutex); 913 vif_priv = (void *) vif->drv_priv; 914 main_vif = carl9170_get_main_vif(ar); 915 if (WARN_ON(!main_vif)) 916 goto out; 917 918 if (changed & BSS_CHANGED_BEACON_ENABLED) { 919 struct carl9170_vif_info *iter; 920 int i = 0; 921 922 vif_priv->enable_beacon = bss_conf->enable_beacon; 923 rcu_read_lock(); 924 list_for_each_entry_rcu(iter, &ar->vif_list, list) { 925 if (iter->active && iter->enable_beacon) 926 i++; 927 928 } 929 rcu_read_unlock(); 930 931 ar->beacon_enabled = i; 932 } 933 934 if (changed & BSS_CHANGED_BEACON) { 935 err = carl9170_update_beacon(ar, false); 936 if (err) 937 goto out; 938 } 939 940 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON | 941 BSS_CHANGED_BEACON_INT)) { 942 943 if (main_vif != vif) { 944 bss_conf->beacon_int = main_vif->bss_conf.beacon_int; 945 bss_conf->dtim_period = main_vif->bss_conf.dtim_period; 946 } 947 948 /* 949 * Therefore a hard limit for the broadcast traffic should 950 * prevent false alarms. 951 */ 952 if (vif->type != NL80211_IFTYPE_STATION && 953 (bss_conf->beacon_int * bss_conf->dtim_period >= 954 (CARL9170_QUEUE_STUCK_TIMEOUT / 2))) { 955 err = -EINVAL; 956 goto out; 957 } 958 959 err = carl9170_set_beacon_timers(ar); 960 if (err) 961 goto out; 962 } 963 964 if (changed & BSS_CHANGED_HT) { 965 /* TODO */ 966 err = 0; 967 if (err) 968 goto out; 969 } 970 971 if (main_vif != vif) 972 goto out; 973 974 /* 975 * The following settings can only be changed by the 976 * master interface. 977 */ 978 979 if (changed & BSS_CHANGED_BSSID) { 980 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); 981 err = carl9170_set_operating_mode(ar); 982 if (err) 983 goto out; 984 } 985 986 if (changed & BSS_CHANGED_ASSOC) { 987 ar->common.curaid = bss_conf->aid; 988 err = carl9170_set_beacon_timers(ar); 989 if (err) 990 goto out; 991 } 992 993 if (changed & BSS_CHANGED_ERP_SLOT) { 994 err = carl9170_set_slot_time(ar); 995 if (err) 996 goto out; 997 } 998 999 if (changed & BSS_CHANGED_BASIC_RATES) { 1000 err = carl9170_set_mac_rates(ar); 1001 if (err) 1002 goto out; 1003 } 1004 1005 out: 1006 WARN_ON_ONCE(err && IS_STARTED(ar)); 1007 mutex_unlock(&ar->mutex); 1008 } 1009 1010 static u64 carl9170_op_get_tsf(struct ieee80211_hw *hw) 1011 { 1012 struct ar9170 *ar = hw->priv; 1013 struct carl9170_tsf_rsp tsf; 1014 int err; 1015 1016 mutex_lock(&ar->mutex); 1017 err = carl9170_exec_cmd(ar, CARL9170_CMD_READ_TSF, 1018 0, NULL, sizeof(tsf), &tsf); 1019 mutex_unlock(&ar->mutex); 1020 if (WARN_ON(err)) 1021 return 0; 1022 1023 return le64_to_cpu(tsf.tsf_64); 1024 } 1025 1026 static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 1027 struct ieee80211_vif *vif, 1028 struct ieee80211_sta *sta, 1029 struct ieee80211_key_conf *key) 1030 { 1031 struct ar9170 *ar = hw->priv; 1032 int err = 0, i; 1033 u8 ktype; 1034 1035 if (ar->disable_offload || !vif) 1036 return -EOPNOTSUPP; 1037 1038 /* 1039 * We have to fall back to software encryption, whenever 1040 * the user choose to participates in an IBSS or is connected 1041 * to more than one network. 1042 * 1043 * This is very unfortunate, because some machines cannot handle 1044 * the high througput speed in 802.11n networks. 1045 */ 1046 1047 if (!is_main_vif(ar, vif)) 1048 goto err_softw; 1049 1050 /* 1051 * While the hardware supports *catch-all* key, for offloading 1052 * group-key en-/de-cryption. The way of how the hardware 1053 * decides which keyId maps to which key, remains a mystery... 1054 */ 1055 if ((vif->type != NL80211_IFTYPE_STATION && 1056 vif->type != NL80211_IFTYPE_ADHOC) && 1057 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 1058 return -EOPNOTSUPP; 1059 1060 switch (key->cipher) { 1061 case WLAN_CIPHER_SUITE_WEP40: 1062 ktype = AR9170_ENC_ALG_WEP64; 1063 break; 1064 case WLAN_CIPHER_SUITE_WEP104: 1065 ktype = AR9170_ENC_ALG_WEP128; 1066 break; 1067 case WLAN_CIPHER_SUITE_TKIP: 1068 ktype = AR9170_ENC_ALG_TKIP; 1069 break; 1070 case WLAN_CIPHER_SUITE_CCMP: 1071 ktype = AR9170_ENC_ALG_AESCCMP; 1072 break; 1073 default: 1074 return -EOPNOTSUPP; 1075 } 1076 1077 mutex_lock(&ar->mutex); 1078 if (cmd == SET_KEY) { 1079 if (!IS_STARTED(ar)) { 1080 err = -EOPNOTSUPP; 1081 goto out; 1082 } 1083 1084 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 1085 sta = NULL; 1086 1087 i = 64 + key->keyidx; 1088 } else { 1089 for (i = 0; i < 64; i++) 1090 if (!(ar->usedkeys & BIT(i))) 1091 break; 1092 if (i == 64) 1093 goto err_softw; 1094 } 1095 1096 key->hw_key_idx = i; 1097 1098 err = carl9170_upload_key(ar, i, sta ? sta->addr : NULL, 1099 ktype, 0, key->key, 1100 min_t(u8, 16, key->keylen)); 1101 if (err) 1102 goto out; 1103 1104 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) { 1105 err = carl9170_upload_key(ar, i, sta ? sta->addr : 1106 NULL, ktype, 1, 1107 key->key + 16, 16); 1108 if (err) 1109 goto out; 1110 1111 /* 1112 * hardware is not capable generating MMIC 1113 * of fragmented frames! 1114 */ 1115 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 1116 } 1117 1118 if (i < 64) 1119 ar->usedkeys |= BIT(i); 1120 1121 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1122 } else { 1123 if (!IS_STARTED(ar)) { 1124 /* The device is gone... together with the key ;-) */ 1125 err = 0; 1126 goto out; 1127 } 1128 1129 if (key->hw_key_idx < 64) { 1130 ar->usedkeys &= ~BIT(key->hw_key_idx); 1131 } else { 1132 err = carl9170_upload_key(ar, key->hw_key_idx, NULL, 1133 AR9170_ENC_ALG_NONE, 0, 1134 NULL, 0); 1135 if (err) 1136 goto out; 1137 1138 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) { 1139 err = carl9170_upload_key(ar, key->hw_key_idx, 1140 NULL, 1141 AR9170_ENC_ALG_NONE, 1142 1, NULL, 0); 1143 if (err) 1144 goto out; 1145 } 1146 1147 } 1148 1149 err = carl9170_disable_key(ar, key->hw_key_idx); 1150 if (err) 1151 goto out; 1152 } 1153 1154 out: 1155 mutex_unlock(&ar->mutex); 1156 return err; 1157 1158 err_softw: 1159 if (!ar->rx_software_decryption) { 1160 ar->rx_software_decryption = true; 1161 carl9170_set_operating_mode(ar); 1162 } 1163 mutex_unlock(&ar->mutex); 1164 return -ENOSPC; 1165 } 1166 1167 static int carl9170_op_sta_add(struct ieee80211_hw *hw, 1168 struct ieee80211_vif *vif, 1169 struct ieee80211_sta *sta) 1170 { 1171 struct carl9170_sta_info *sta_info = (void *) sta->drv_priv; 1172 unsigned int i; 1173 1174 if (sta->ht_cap.ht_supported) { 1175 if (sta->ht_cap.ampdu_density > 6) { 1176 /* 1177 * HW does support 16us AMPDU density. 1178 * No HT-Xmit for station. 1179 */ 1180 1181 return 0; 1182 } 1183 1184 for (i = 0; i < CARL9170_NUM_TID; i++) 1185 rcu_assign_pointer(sta_info->agg[i], NULL); 1186 1187 sta_info->ampdu_max_len = 1 << (3 + sta->ht_cap.ampdu_factor); 1188 sta_info->ht_sta = true; 1189 } 1190 1191 return 0; 1192 } 1193 1194 static int carl9170_op_sta_remove(struct ieee80211_hw *hw, 1195 struct ieee80211_vif *vif, 1196 struct ieee80211_sta *sta) 1197 { 1198 struct ar9170 *ar = hw->priv; 1199 struct carl9170_sta_info *sta_info = (void *) sta->drv_priv; 1200 unsigned int i; 1201 bool cleanup = false; 1202 1203 if (sta->ht_cap.ht_supported) { 1204 1205 sta_info->ht_sta = false; 1206 1207 rcu_read_lock(); 1208 for (i = 0; i < CARL9170_NUM_TID; i++) { 1209 struct carl9170_sta_tid *tid_info; 1210 1211 tid_info = rcu_dereference(sta_info->agg[i]); 1212 rcu_assign_pointer(sta_info->agg[i], NULL); 1213 1214 if (!tid_info) 1215 continue; 1216 1217 spin_lock_bh(&ar->tx_ampdu_list_lock); 1218 if (tid_info->state > CARL9170_TID_STATE_SHUTDOWN) 1219 tid_info->state = CARL9170_TID_STATE_SHUTDOWN; 1220 spin_unlock_bh(&ar->tx_ampdu_list_lock); 1221 cleanup = true; 1222 } 1223 rcu_read_unlock(); 1224 1225 if (cleanup) 1226 carl9170_ampdu_gc(ar); 1227 } 1228 1229 return 0; 1230 } 1231 1232 static int carl9170_op_conf_tx(struct ieee80211_hw *hw, u16 queue, 1233 const struct ieee80211_tx_queue_params *param) 1234 { 1235 struct ar9170 *ar = hw->priv; 1236 int ret; 1237 1238 mutex_lock(&ar->mutex); 1239 if (queue < ar->hw->queues) { 1240 memcpy(&ar->edcf[ar9170_qmap[queue]], param, sizeof(*param)); 1241 ret = carl9170_set_qos(ar); 1242 } else { 1243 ret = -EINVAL; 1244 } 1245 1246 mutex_unlock(&ar->mutex); 1247 return ret; 1248 } 1249 1250 static void carl9170_ampdu_work(struct work_struct *work) 1251 { 1252 struct ar9170 *ar = container_of(work, struct ar9170, 1253 ampdu_work); 1254 1255 if (!IS_STARTED(ar)) 1256 return; 1257 1258 mutex_lock(&ar->mutex); 1259 carl9170_ampdu_gc(ar); 1260 mutex_unlock(&ar->mutex); 1261 } 1262 1263 static int carl9170_op_ampdu_action(struct ieee80211_hw *hw, 1264 struct ieee80211_vif *vif, 1265 enum ieee80211_ampdu_mlme_action action, 1266 struct ieee80211_sta *sta, 1267 u16 tid, u16 *ssn) 1268 { 1269 struct ar9170 *ar = hw->priv; 1270 struct carl9170_sta_info *sta_info = (void *) sta->drv_priv; 1271 struct carl9170_sta_tid *tid_info; 1272 1273 if (modparam_noht) 1274 return -EOPNOTSUPP; 1275 1276 switch (action) { 1277 case IEEE80211_AMPDU_TX_START: 1278 if (!sta_info->ht_sta) 1279 return -EOPNOTSUPP; 1280 1281 rcu_read_lock(); 1282 if (rcu_dereference(sta_info->agg[tid])) { 1283 rcu_read_unlock(); 1284 return -EBUSY; 1285 } 1286 1287 tid_info = kzalloc(sizeof(struct carl9170_sta_tid), 1288 GFP_ATOMIC); 1289 if (!tid_info) { 1290 rcu_read_unlock(); 1291 return -ENOMEM; 1292 } 1293 1294 tid_info->hsn = tid_info->bsn = tid_info->snx = (*ssn); 1295 tid_info->state = CARL9170_TID_STATE_PROGRESS; 1296 tid_info->tid = tid; 1297 tid_info->max = sta_info->ampdu_max_len; 1298 1299 INIT_LIST_HEAD(&tid_info->list); 1300 INIT_LIST_HEAD(&tid_info->tmp_list); 1301 skb_queue_head_init(&tid_info->queue); 1302 spin_lock_init(&tid_info->lock); 1303 1304 spin_lock_bh(&ar->tx_ampdu_list_lock); 1305 ar->tx_ampdu_list_len++; 1306 list_add_tail_rcu(&tid_info->list, &ar->tx_ampdu_list); 1307 rcu_assign_pointer(sta_info->agg[tid], tid_info); 1308 spin_unlock_bh(&ar->tx_ampdu_list_lock); 1309 rcu_read_unlock(); 1310 1311 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1312 break; 1313 1314 case IEEE80211_AMPDU_TX_STOP: 1315 rcu_read_lock(); 1316 tid_info = rcu_dereference(sta_info->agg[tid]); 1317 if (tid_info) { 1318 spin_lock_bh(&ar->tx_ampdu_list_lock); 1319 if (tid_info->state > CARL9170_TID_STATE_SHUTDOWN) 1320 tid_info->state = CARL9170_TID_STATE_SHUTDOWN; 1321 spin_unlock_bh(&ar->tx_ampdu_list_lock); 1322 } 1323 1324 rcu_assign_pointer(sta_info->agg[tid], NULL); 1325 rcu_read_unlock(); 1326 1327 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1328 ieee80211_queue_work(ar->hw, &ar->ampdu_work); 1329 break; 1330 1331 case IEEE80211_AMPDU_TX_OPERATIONAL: 1332 rcu_read_lock(); 1333 tid_info = rcu_dereference(sta_info->agg[tid]); 1334 1335 sta_info->stats[tid].clear = true; 1336 1337 if (tid_info) { 1338 bitmap_zero(tid_info->bitmap, CARL9170_BAW_SIZE); 1339 tid_info->state = CARL9170_TID_STATE_IDLE; 1340 } 1341 rcu_read_unlock(); 1342 1343 if (WARN_ON_ONCE(!tid_info)) 1344 return -EFAULT; 1345 1346 break; 1347 1348 case IEEE80211_AMPDU_RX_START: 1349 case IEEE80211_AMPDU_RX_STOP: 1350 /* Handled by hardware */ 1351 break; 1352 1353 default: 1354 return -EOPNOTSUPP; 1355 } 1356 1357 return 0; 1358 } 1359 1360 #ifdef CONFIG_CARL9170_WPC 1361 static int carl9170_register_wps_button(struct ar9170 *ar) 1362 { 1363 struct input_dev *input; 1364 int err; 1365 1366 if (!(ar->features & CARL9170_WPS_BUTTON)) 1367 return 0; 1368 1369 input = input_allocate_device(); 1370 if (!input) 1371 return -ENOMEM; 1372 1373 snprintf(ar->wps.name, sizeof(ar->wps.name), "%s WPS Button", 1374 wiphy_name(ar->hw->wiphy)); 1375 1376 snprintf(ar->wps.phys, sizeof(ar->wps.phys), 1377 "ieee80211/%s/input0", wiphy_name(ar->hw->wiphy)); 1378 1379 input->name = ar->wps.name; 1380 input->phys = ar->wps.phys; 1381 input->id.bustype = BUS_USB; 1382 input->dev.parent = &ar->hw->wiphy->dev; 1383 1384 input_set_capability(input, EV_KEY, KEY_WPS_BUTTON); 1385 1386 err = input_register_device(input); 1387 if (err) { 1388 input_free_device(input); 1389 return err; 1390 } 1391 1392 ar->wps.pbc = input; 1393 return 0; 1394 } 1395 #endif /* CONFIG_CARL9170_WPC */ 1396 1397 static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, 1398 struct survey_info *survey) 1399 { 1400 struct ar9170 *ar = hw->priv; 1401 int err; 1402 1403 if (idx != 0) 1404 return -ENOENT; 1405 1406 mutex_lock(&ar->mutex); 1407 err = carl9170_get_noisefloor(ar); 1408 mutex_unlock(&ar->mutex); 1409 if (err) 1410 return err; 1411 1412 survey->channel = ar->channel; 1413 survey->filled = SURVEY_INFO_NOISE_DBM; 1414 survey->noise = ar->noise[0]; 1415 return 0; 1416 } 1417 1418 static void carl9170_op_flush(struct ieee80211_hw *hw, bool drop) 1419 { 1420 struct ar9170 *ar = hw->priv; 1421 unsigned int vid; 1422 1423 mutex_lock(&ar->mutex); 1424 for_each_set_bit(vid, &ar->vif_bitmap, ar->fw.vif_num) 1425 carl9170_flush_cab(ar, vid); 1426 1427 carl9170_flush(ar, drop); 1428 mutex_unlock(&ar->mutex); 1429 } 1430 1431 static int carl9170_op_get_stats(struct ieee80211_hw *hw, 1432 struct ieee80211_low_level_stats *stats) 1433 { 1434 struct ar9170 *ar = hw->priv; 1435 1436 memset(stats, 0, sizeof(*stats)); 1437 stats->dot11ACKFailureCount = ar->tx_ack_failures; 1438 stats->dot11FCSErrorCount = ar->tx_fcs_errors; 1439 return 0; 1440 } 1441 1442 static void carl9170_op_sta_notify(struct ieee80211_hw *hw, 1443 struct ieee80211_vif *vif, 1444 enum sta_notify_cmd cmd, 1445 struct ieee80211_sta *sta) 1446 { 1447 struct ar9170 *ar = hw->priv; 1448 struct carl9170_sta_info *sta_info = (void *) sta->drv_priv; 1449 struct sk_buff *skb, *tmp; 1450 struct sk_buff_head free; 1451 int i; 1452 1453 switch (cmd) { 1454 case STA_NOTIFY_SLEEP: 1455 /* 1456 * Since the peer is no longer listening, we have to return 1457 * as many SKBs as possible back to the mac80211 stack. 1458 * It will deal with the retry procedure, once the peer 1459 * has become available again. 1460 * 1461 * NB: Ideally, the driver should return the all frames in 1462 * the correct, ascending order. However, I think that this 1463 * functionality should be implemented in the stack and not 1464 * here... 1465 */ 1466 1467 __skb_queue_head_init(&free); 1468 1469 if (sta->ht_cap.ht_supported) { 1470 rcu_read_lock(); 1471 for (i = 0; i < CARL9170_NUM_TID; i++) { 1472 struct carl9170_sta_tid *tid_info; 1473 1474 tid_info = rcu_dereference(sta_info->agg[i]); 1475 1476 if (!tid_info) 1477 continue; 1478 1479 spin_lock_bh(&ar->tx_ampdu_list_lock); 1480 if (tid_info->state > 1481 CARL9170_TID_STATE_SUSPEND) 1482 tid_info->state = 1483 CARL9170_TID_STATE_SUSPEND; 1484 spin_unlock_bh(&ar->tx_ampdu_list_lock); 1485 1486 spin_lock_bh(&tid_info->lock); 1487 while ((skb = __skb_dequeue(&tid_info->queue))) 1488 __skb_queue_tail(&free, skb); 1489 spin_unlock_bh(&tid_info->lock); 1490 } 1491 rcu_read_unlock(); 1492 } 1493 1494 for (i = 0; i < ar->hw->queues; i++) { 1495 spin_lock_bh(&ar->tx_pending[i].lock); 1496 skb_queue_walk_safe(&ar->tx_pending[i], skb, tmp) { 1497 struct _carl9170_tx_superframe *super; 1498 struct ieee80211_hdr *hdr; 1499 struct ieee80211_tx_info *info; 1500 1501 super = (void *) skb->data; 1502 hdr = (void *) super->frame_data; 1503 1504 if (compare_ether_addr(hdr->addr1, sta->addr)) 1505 continue; 1506 1507 __skb_unlink(skb, &ar->tx_pending[i]); 1508 1509 info = IEEE80211_SKB_CB(skb); 1510 if (info->flags & IEEE80211_TX_CTL_AMPDU) 1511 atomic_dec(&ar->tx_ampdu_upload); 1512 1513 carl9170_tx_status(ar, skb, false); 1514 } 1515 spin_unlock_bh(&ar->tx_pending[i].lock); 1516 } 1517 1518 while ((skb = __skb_dequeue(&free))) 1519 carl9170_tx_status(ar, skb, false); 1520 1521 break; 1522 1523 case STA_NOTIFY_AWAKE: 1524 if (!sta->ht_cap.ht_supported) 1525 return; 1526 1527 rcu_read_lock(); 1528 for (i = 0; i < CARL9170_NUM_TID; i++) { 1529 struct carl9170_sta_tid *tid_info; 1530 1531 tid_info = rcu_dereference(sta_info->agg[i]); 1532 1533 if (!tid_info) 1534 continue; 1535 1536 if ((tid_info->state == CARL9170_TID_STATE_SUSPEND)) 1537 tid_info->state = CARL9170_TID_STATE_IDLE; 1538 } 1539 rcu_read_unlock(); 1540 break; 1541 } 1542 } 1543 1544 static const struct ieee80211_ops carl9170_ops = { 1545 .start = carl9170_op_start, 1546 .stop = carl9170_op_stop, 1547 .tx = carl9170_op_tx, 1548 .flush = carl9170_op_flush, 1549 .add_interface = carl9170_op_add_interface, 1550 .remove_interface = carl9170_op_remove_interface, 1551 .config = carl9170_op_config, 1552 .prepare_multicast = carl9170_op_prepare_multicast, 1553 .configure_filter = carl9170_op_configure_filter, 1554 .conf_tx = carl9170_op_conf_tx, 1555 .bss_info_changed = carl9170_op_bss_info_changed, 1556 .get_tsf = carl9170_op_get_tsf, 1557 .set_key = carl9170_op_set_key, 1558 .sta_add = carl9170_op_sta_add, 1559 .sta_remove = carl9170_op_sta_remove, 1560 .sta_notify = carl9170_op_sta_notify, 1561 .get_survey = carl9170_op_get_survey, 1562 .get_stats = carl9170_op_get_stats, 1563 .ampdu_action = carl9170_op_ampdu_action, 1564 }; 1565 1566 void *carl9170_alloc(size_t priv_size) 1567 { 1568 struct ieee80211_hw *hw; 1569 struct ar9170 *ar; 1570 struct sk_buff *skb; 1571 int i; 1572 1573 /* 1574 * this buffer is used for rx stream reconstruction. 1575 * Under heavy load this device (or the transport layer?) 1576 * tends to split the streams into separate rx descriptors. 1577 */ 1578 1579 skb = __dev_alloc_skb(AR9170_RX_STREAM_MAX_SIZE, GFP_KERNEL); 1580 if (!skb) 1581 goto err_nomem; 1582 1583 hw = ieee80211_alloc_hw(priv_size, &carl9170_ops); 1584 if (!hw) 1585 goto err_nomem; 1586 1587 ar = hw->priv; 1588 ar->hw = hw; 1589 ar->rx_failover = skb; 1590 1591 memset(&ar->rx_plcp, 0, sizeof(struct ar9170_rx_head)); 1592 ar->rx_has_plcp = false; 1593 1594 /* 1595 * Here's a hidden pitfall! 1596 * 1597 * All 4 AC queues work perfectly well under _legacy_ operation. 1598 * However as soon as aggregation is enabled, the traffic flow 1599 * gets very bumpy. Therefore we have to _switch_ to a 1600 * software AC with a single HW queue. 1601 */ 1602 hw->queues = __AR9170_NUM_TXQ; 1603 1604 mutex_init(&ar->mutex); 1605 spin_lock_init(&ar->beacon_lock); 1606 spin_lock_init(&ar->cmd_lock); 1607 spin_lock_init(&ar->tx_stats_lock); 1608 spin_lock_init(&ar->tx_ampdu_list_lock); 1609 spin_lock_init(&ar->mem_lock); 1610 spin_lock_init(&ar->state_lock); 1611 atomic_set(&ar->pending_restarts, 0); 1612 ar->vifs = 0; 1613 for (i = 0; i < ar->hw->queues; i++) { 1614 skb_queue_head_init(&ar->tx_status[i]); 1615 skb_queue_head_init(&ar->tx_pending[i]); 1616 } 1617 INIT_WORK(&ar->ps_work, carl9170_ps_work); 1618 INIT_WORK(&ar->restart_work, carl9170_restart_work); 1619 INIT_WORK(&ar->ampdu_work, carl9170_ampdu_work); 1620 INIT_DELAYED_WORK(&ar->tx_janitor, carl9170_tx_janitor); 1621 INIT_LIST_HEAD(&ar->tx_ampdu_list); 1622 rcu_assign_pointer(ar->tx_ampdu_iter, 1623 (struct carl9170_sta_tid *) &ar->tx_ampdu_list); 1624 1625 bitmap_zero(&ar->vif_bitmap, ar->fw.vif_num); 1626 INIT_LIST_HEAD(&ar->vif_list); 1627 init_completion(&ar->tx_flush); 1628 1629 /* 1630 * Note: 1631 * IBSS/ADHOC and AP mode are only enabled, if the firmware 1632 * supports these modes. The code which will add the 1633 * additional interface_modes is in fw.c. 1634 */ 1635 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1636 BIT(NL80211_IFTYPE_P2P_CLIENT); 1637 1638 hw->flags |= IEEE80211_HW_RX_INCLUDES_FCS | 1639 IEEE80211_HW_REPORTS_TX_ACK_STATUS | 1640 IEEE80211_HW_SUPPORTS_PS | 1641 IEEE80211_HW_PS_NULLFUNC_STACK | 1642 IEEE80211_HW_SIGNAL_DBM; 1643 1644 if (!modparam_noht) { 1645 /* 1646 * see the comment above, why we allow the user 1647 * to disable HT by a module parameter. 1648 */ 1649 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; 1650 } 1651 1652 hw->extra_tx_headroom = sizeof(struct _carl9170_tx_superframe); 1653 hw->sta_data_size = sizeof(struct carl9170_sta_info); 1654 hw->vif_data_size = sizeof(struct carl9170_vif_info); 1655 1656 hw->max_rates = CARL9170_TX_MAX_RATES; 1657 hw->max_rate_tries = CARL9170_TX_USER_RATE_TRIES; 1658 1659 for (i = 0; i < ARRAY_SIZE(ar->noise); i++) 1660 ar->noise[i] = -95; /* ATH_DEFAULT_NOISE_FLOOR */ 1661 1662 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 1663 return ar; 1664 1665 err_nomem: 1666 kfree_skb(skb); 1667 return ERR_PTR(-ENOMEM); 1668 } 1669 1670 static int carl9170_read_eeprom(struct ar9170 *ar) 1671 { 1672 #define RW 8 /* number of words to read at once */ 1673 #define RB (sizeof(u32) * RW) 1674 u8 *eeprom = (void *)&ar->eeprom; 1675 __le32 offsets[RW]; 1676 int i, j, err; 1677 1678 BUILD_BUG_ON(sizeof(ar->eeprom) & 3); 1679 1680 BUILD_BUG_ON(RB > CARL9170_MAX_CMD_LEN - 4); 1681 #ifndef __CHECKER__ 1682 /* don't want to handle trailing remains */ 1683 BUILD_BUG_ON(sizeof(ar->eeprom) % RB); 1684 #endif 1685 1686 for (i = 0; i < sizeof(ar->eeprom)/RB; i++) { 1687 for (j = 0; j < RW; j++) 1688 offsets[j] = cpu_to_le32(AR9170_EEPROM_START + 1689 RB * i + 4 * j); 1690 1691 err = carl9170_exec_cmd(ar, CARL9170_CMD_RREG, 1692 RB, (u8 *) &offsets, 1693 RB, eeprom + RB * i); 1694 if (err) 1695 return err; 1696 } 1697 1698 #undef RW 1699 #undef RB 1700 return 0; 1701 } 1702 1703 static int carl9170_parse_eeprom(struct ar9170 *ar) 1704 { 1705 struct ath_regulatory *regulatory = &ar->common.regulatory; 1706 unsigned int rx_streams, tx_streams, tx_params = 0; 1707 int bands = 0; 1708 1709 if (ar->eeprom.length == cpu_to_le16(0xffff)) 1710 return -ENODATA; 1711 1712 rx_streams = hweight8(ar->eeprom.rx_mask); 1713 tx_streams = hweight8(ar->eeprom.tx_mask); 1714 1715 if (rx_streams != tx_streams) { 1716 tx_params = IEEE80211_HT_MCS_TX_RX_DIFF; 1717 1718 WARN_ON(!(tx_streams >= 1 && tx_streams <= 1719 IEEE80211_HT_MCS_TX_MAX_STREAMS)); 1720 1721 tx_params = (tx_streams - 1) << 1722 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; 1723 1724 carl9170_band_2GHz.ht_cap.mcs.tx_params |= tx_params; 1725 carl9170_band_5GHz.ht_cap.mcs.tx_params |= tx_params; 1726 } 1727 1728 if (ar->eeprom.operating_flags & AR9170_OPFLAG_2GHZ) { 1729 ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 1730 &carl9170_band_2GHz; 1731 bands++; 1732 } 1733 if (ar->eeprom.operating_flags & AR9170_OPFLAG_5GHZ) { 1734 ar->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 1735 &carl9170_band_5GHz; 1736 bands++; 1737 } 1738 1739 /* 1740 * I measured this, a bandswitch takes roughly 1741 * 135 ms and a frequency switch about 80. 1742 * 1743 * FIXME: measure these values again once EEPROM settings 1744 * are used, that will influence them! 1745 */ 1746 if (bands == 2) 1747 ar->hw->channel_change_time = 135 * 1000; 1748 else 1749 ar->hw->channel_change_time = 80 * 1000; 1750 1751 regulatory->current_rd = le16_to_cpu(ar->eeprom.reg_domain[0]); 1752 regulatory->current_rd_ext = le16_to_cpu(ar->eeprom.reg_domain[1]); 1753 1754 /* second part of wiphy init */ 1755 SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address); 1756 1757 return bands ? 0 : -EINVAL; 1758 } 1759 1760 static int carl9170_reg_notifier(struct wiphy *wiphy, 1761 struct regulatory_request *request) 1762 { 1763 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 1764 struct ar9170 *ar = hw->priv; 1765 1766 return ath_reg_notifier_apply(wiphy, request, &ar->common.regulatory); 1767 } 1768 1769 int carl9170_register(struct ar9170 *ar) 1770 { 1771 struct ath_regulatory *regulatory = &ar->common.regulatory; 1772 int err = 0, i; 1773 1774 if (WARN_ON(ar->mem_bitmap)) 1775 return -EINVAL; 1776 1777 ar->mem_bitmap = kzalloc(roundup(ar->fw.mem_blocks, BITS_PER_LONG) * 1778 sizeof(unsigned long), GFP_KERNEL); 1779 1780 if (!ar->mem_bitmap) 1781 return -ENOMEM; 1782 1783 /* try to read EEPROM, init MAC addr */ 1784 err = carl9170_read_eeprom(ar); 1785 if (err) 1786 return err; 1787 1788 err = carl9170_fw_fix_eeprom(ar); 1789 if (err) 1790 return err; 1791 1792 err = carl9170_parse_eeprom(ar); 1793 if (err) 1794 return err; 1795 1796 err = ath_regd_init(regulatory, ar->hw->wiphy, 1797 carl9170_reg_notifier); 1798 if (err) 1799 return err; 1800 1801 if (modparam_noht) { 1802 carl9170_band_2GHz.ht_cap.ht_supported = false; 1803 carl9170_band_5GHz.ht_cap.ht_supported = false; 1804 } 1805 1806 for (i = 0; i < ar->fw.vif_num; i++) { 1807 ar->vif_priv[i].id = i; 1808 ar->vif_priv[i].vif = NULL; 1809 } 1810 1811 err = ieee80211_register_hw(ar->hw); 1812 if (err) 1813 return err; 1814 1815 /* mac80211 interface is now registered */ 1816 ar->registered = true; 1817 1818 if (!ath_is_world_regd(regulatory)) 1819 regulatory_hint(ar->hw->wiphy, regulatory->alpha2); 1820 1821 #ifdef CONFIG_CARL9170_DEBUGFS 1822 carl9170_debugfs_register(ar); 1823 #endif /* CONFIG_CARL9170_DEBUGFS */ 1824 1825 err = carl9170_led_init(ar); 1826 if (err) 1827 goto err_unreg; 1828 1829 #ifdef CONFIG_CARL9170_LEDS 1830 err = carl9170_led_register(ar); 1831 if (err) 1832 goto err_unreg; 1833 #endif /* CONFIG_CAR9L170_LEDS */ 1834 1835 #ifdef CONFIG_CARL9170_WPC 1836 err = carl9170_register_wps_button(ar); 1837 if (err) 1838 goto err_unreg; 1839 #endif /* CONFIG_CARL9170_WPC */ 1840 1841 dev_info(&ar->udev->dev, "Atheros AR9170 is registered as '%s'\n", 1842 wiphy_name(ar->hw->wiphy)); 1843 1844 return 0; 1845 1846 err_unreg: 1847 carl9170_unregister(ar); 1848 return err; 1849 } 1850 1851 void carl9170_unregister(struct ar9170 *ar) 1852 { 1853 if (!ar->registered) 1854 return; 1855 1856 ar->registered = false; 1857 1858 #ifdef CONFIG_CARL9170_LEDS 1859 carl9170_led_unregister(ar); 1860 #endif /* CONFIG_CARL9170_LEDS */ 1861 1862 #ifdef CONFIG_CARL9170_DEBUGFS 1863 carl9170_debugfs_unregister(ar); 1864 #endif /* CONFIG_CARL9170_DEBUGFS */ 1865 1866 #ifdef CONFIG_CARL9170_WPC 1867 if (ar->wps.pbc) { 1868 input_unregister_device(ar->wps.pbc); 1869 ar->wps.pbc = NULL; 1870 } 1871 #endif /* CONFIG_CARL9170_WPC */ 1872 1873 carl9170_cancel_worker(ar); 1874 cancel_work_sync(&ar->restart_work); 1875 1876 ieee80211_unregister_hw(ar->hw); 1877 } 1878 1879 void carl9170_free(struct ar9170 *ar) 1880 { 1881 WARN_ON(ar->registered); 1882 WARN_ON(IS_INITIALIZED(ar)); 1883 1884 kfree_skb(ar->rx_failover); 1885 ar->rx_failover = NULL; 1886 1887 kfree(ar->mem_bitmap); 1888 ar->mem_bitmap = NULL; 1889 1890 mutex_destroy(&ar->mutex); 1891 1892 ieee80211_free_hw(ar->hw); 1893 } 1894 1895 1896 1897 1898 1899 /* LDV_COMMENT_BEGIN_MAIN */ 1900 #ifdef LDV_MAIN0_sequence_infinite_withcheck_stateful 1901 1902 /*###########################################################################*/ 1903 1904 /*############## Driver Environment Generator 0.2 output ####################*/ 1905 1906 /*###########################################################################*/ 1907 1908 1909 1910 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Test if all kernel resources are correctly released by driver before driver will be unloaded. */ 1911 void ldv_check_final_state(void); 1912 1913 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Test correct return result. */ 1914 void ldv_check_return_value(int res); 1915 1916 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Initializes the model. */ 1917 void ldv_initialize(void); 1918 1919 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Returns arbitrary interger value. */ 1920 int nondet_int(void); 1921 1922 /* LDV_COMMENT_VAR_DECLARE_LDV Special variable for LDV verifier. */ 1923 int LDV_IN_INTERRUPT; 1924 1925 /* LDV_COMMENT_FUNCTION_MAIN Main function for LDV verifier. */ 1926 void ldv_main0_sequence_infinite_withcheck_stateful(void) { 1927 1928 1929 1930 /* LDV_COMMENT_BEGIN_VARIABLE_DECLARATION_PART */ 1931 /*============================= VARIABLE DECLARATION PART =============================*/ 1932 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 1933 /* content: static int carl9170_op_start(struct ieee80211_hw *hw)*/ 1934 /* LDV_COMMENT_BEGIN_PREP */ 1935 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 1936 .bitrate = (_bitrate), \ 1937 .flags = (_flags), \ 1938 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 1939 } 1940 #undef RATE 1941 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 1942 #define carl9170_g_ratetable_size 12 1943 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 1944 #define carl9170_a_ratetable_size 8 1945 #define CHAN(_freq, _idx) { \ 1946 .center_freq = (_freq), \ 1947 .hw_value = (_idx), \ 1948 .max_power = 18, \ 1949 } 1950 #undef CHAN 1951 #define CARL9170_HT_CAP \ 1952 { \ 1953 .ht_supported = true, \ 1954 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 1955 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 1956 IEEE80211_HT_CAP_SGI_40 | \ 1957 IEEE80211_HT_CAP_DSSSCCK40 | \ 1958 IEEE80211_HT_CAP_SM_PS, \ 1959 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 1960 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 1961 .mcs = { \ 1962 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 1963 .rx_highest = cpu_to_le16(300), \ 1964 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 1965 }, \ 1966 } 1967 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 1968 do { \ 1969 queue.aifs = ai_fs; \ 1970 queue.cw_min = cwmin; \ 1971 queue.cw_max = cwmax; \ 1972 queue.txop = _txop; \ 1973 } while (0) 1974 /* LDV_COMMENT_END_PREP */ 1975 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_start" */ 1976 struct ieee80211_hw * var_group1; 1977 /* LDV_COMMENT_BEGIN_PREP */ 1978 #ifdef CONFIG_CARL9170_LEDS 1979 #endif 1980 #ifdef CONFIG_CARL9170_WPC 1981 #endif 1982 #define RW 8 1983 #define RB (sizeof(u32) * RW) 1984 #ifndef __CHECKER__ 1985 #endif 1986 #undef RW 1987 #undef RB 1988 #ifdef CONFIG_CARL9170_DEBUGFS 1989 #endif 1990 #ifdef CONFIG_CARL9170_LEDS 1991 #endif 1992 #ifdef CONFIG_CARL9170_WPC 1993 #endif 1994 #ifdef CONFIG_CARL9170_LEDS 1995 #endif 1996 #ifdef CONFIG_CARL9170_DEBUGFS 1997 #endif 1998 #ifdef CONFIG_CARL9170_WPC 1999 #endif 2000 /* LDV_COMMENT_END_PREP */ 2001 /* content: static void carl9170_op_stop(struct ieee80211_hw *hw)*/ 2002 /* LDV_COMMENT_BEGIN_PREP */ 2003 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2004 .bitrate = (_bitrate), \ 2005 .flags = (_flags), \ 2006 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2007 } 2008 #undef RATE 2009 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2010 #define carl9170_g_ratetable_size 12 2011 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2012 #define carl9170_a_ratetable_size 8 2013 #define CHAN(_freq, _idx) { \ 2014 .center_freq = (_freq), \ 2015 .hw_value = (_idx), \ 2016 .max_power = 18, \ 2017 } 2018 #undef CHAN 2019 #define CARL9170_HT_CAP \ 2020 { \ 2021 .ht_supported = true, \ 2022 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2023 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2024 IEEE80211_HT_CAP_SGI_40 | \ 2025 IEEE80211_HT_CAP_DSSSCCK40 | \ 2026 IEEE80211_HT_CAP_SM_PS, \ 2027 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2028 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2029 .mcs = { \ 2030 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2031 .rx_highest = cpu_to_le16(300), \ 2032 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2033 }, \ 2034 } 2035 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2036 do { \ 2037 queue.aifs = ai_fs; \ 2038 queue.cw_min = cwmin; \ 2039 queue.cw_max = cwmax; \ 2040 queue.txop = _txop; \ 2041 } while (0) 2042 #ifdef CONFIG_CARL9170_LEDS 2043 #endif 2044 /* LDV_COMMENT_END_PREP */ 2045 /* LDV_COMMENT_BEGIN_PREP */ 2046 #ifdef CONFIG_CARL9170_WPC 2047 #endif 2048 #define RW 8 2049 #define RB (sizeof(u32) * RW) 2050 #ifndef __CHECKER__ 2051 #endif 2052 #undef RW 2053 #undef RB 2054 #ifdef CONFIG_CARL9170_DEBUGFS 2055 #endif 2056 #ifdef CONFIG_CARL9170_LEDS 2057 #endif 2058 #ifdef CONFIG_CARL9170_WPC 2059 #endif 2060 #ifdef CONFIG_CARL9170_LEDS 2061 #endif 2062 #ifdef CONFIG_CARL9170_DEBUGFS 2063 #endif 2064 #ifdef CONFIG_CARL9170_WPC 2065 #endif 2066 /* LDV_COMMENT_END_PREP */ 2067 /* content: static void carl9170_op_flush(struct ieee80211_hw *hw, bool drop)*/ 2068 /* LDV_COMMENT_BEGIN_PREP */ 2069 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2070 .bitrate = (_bitrate), \ 2071 .flags = (_flags), \ 2072 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2073 } 2074 #undef RATE 2075 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2076 #define carl9170_g_ratetable_size 12 2077 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2078 #define carl9170_a_ratetable_size 8 2079 #define CHAN(_freq, _idx) { \ 2080 .center_freq = (_freq), \ 2081 .hw_value = (_idx), \ 2082 .max_power = 18, \ 2083 } 2084 #undef CHAN 2085 #define CARL9170_HT_CAP \ 2086 { \ 2087 .ht_supported = true, \ 2088 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2089 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2090 IEEE80211_HT_CAP_SGI_40 | \ 2091 IEEE80211_HT_CAP_DSSSCCK40 | \ 2092 IEEE80211_HT_CAP_SM_PS, \ 2093 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2094 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2095 .mcs = { \ 2096 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2097 .rx_highest = cpu_to_le16(300), \ 2098 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2099 }, \ 2100 } 2101 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2102 do { \ 2103 queue.aifs = ai_fs; \ 2104 queue.cw_min = cwmin; \ 2105 queue.cw_max = cwmax; \ 2106 queue.txop = _txop; \ 2107 } while (0) 2108 #ifdef CONFIG_CARL9170_LEDS 2109 #endif 2110 #ifdef CONFIG_CARL9170_WPC 2111 #endif 2112 /* LDV_COMMENT_END_PREP */ 2113 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_flush" */ 2114 bool var_carl9170_op_flush_28_p1; 2115 /* LDV_COMMENT_BEGIN_PREP */ 2116 #define RW 8 2117 #define RB (sizeof(u32) * RW) 2118 #ifndef __CHECKER__ 2119 #endif 2120 #undef RW 2121 #undef RB 2122 #ifdef CONFIG_CARL9170_DEBUGFS 2123 #endif 2124 #ifdef CONFIG_CARL9170_LEDS 2125 #endif 2126 #ifdef CONFIG_CARL9170_WPC 2127 #endif 2128 #ifdef CONFIG_CARL9170_LEDS 2129 #endif 2130 #ifdef CONFIG_CARL9170_DEBUGFS 2131 #endif 2132 #ifdef CONFIG_CARL9170_WPC 2133 #endif 2134 /* LDV_COMMENT_END_PREP */ 2135 /* content: static int carl9170_op_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)*/ 2136 /* LDV_COMMENT_BEGIN_PREP */ 2137 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2138 .bitrate = (_bitrate), \ 2139 .flags = (_flags), \ 2140 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2141 } 2142 #undef RATE 2143 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2144 #define carl9170_g_ratetable_size 12 2145 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2146 #define carl9170_a_ratetable_size 8 2147 #define CHAN(_freq, _idx) { \ 2148 .center_freq = (_freq), \ 2149 .hw_value = (_idx), \ 2150 .max_power = 18, \ 2151 } 2152 #undef CHAN 2153 #define CARL9170_HT_CAP \ 2154 { \ 2155 .ht_supported = true, \ 2156 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2157 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2158 IEEE80211_HT_CAP_SGI_40 | \ 2159 IEEE80211_HT_CAP_DSSSCCK40 | \ 2160 IEEE80211_HT_CAP_SM_PS, \ 2161 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2162 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2163 .mcs = { \ 2164 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2165 .rx_highest = cpu_to_le16(300), \ 2166 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2167 }, \ 2168 } 2169 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2170 do { \ 2171 queue.aifs = ai_fs; \ 2172 queue.cw_min = cwmin; \ 2173 queue.cw_max = cwmax; \ 2174 queue.txop = _txop; \ 2175 } while (0) 2176 #ifdef CONFIG_CARL9170_LEDS 2177 #endif 2178 /* LDV_COMMENT_END_PREP */ 2179 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_add_interface" */ 2180 struct ieee80211_vif * var_group2; 2181 /* LDV_COMMENT_BEGIN_PREP */ 2182 #ifdef CONFIG_CARL9170_WPC 2183 #endif 2184 #define RW 8 2185 #define RB (sizeof(u32) * RW) 2186 #ifndef __CHECKER__ 2187 #endif 2188 #undef RW 2189 #undef RB 2190 #ifdef CONFIG_CARL9170_DEBUGFS 2191 #endif 2192 #ifdef CONFIG_CARL9170_LEDS 2193 #endif 2194 #ifdef CONFIG_CARL9170_WPC 2195 #endif 2196 #ifdef CONFIG_CARL9170_LEDS 2197 #endif 2198 #ifdef CONFIG_CARL9170_DEBUGFS 2199 #endif 2200 #ifdef CONFIG_CARL9170_WPC 2201 #endif 2202 /* LDV_COMMENT_END_PREP */ 2203 /* content: static void carl9170_op_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)*/ 2204 /* LDV_COMMENT_BEGIN_PREP */ 2205 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2206 .bitrate = (_bitrate), \ 2207 .flags = (_flags), \ 2208 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2209 } 2210 #undef RATE 2211 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2212 #define carl9170_g_ratetable_size 12 2213 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2214 #define carl9170_a_ratetable_size 8 2215 #define CHAN(_freq, _idx) { \ 2216 .center_freq = (_freq), \ 2217 .hw_value = (_idx), \ 2218 .max_power = 18, \ 2219 } 2220 #undef CHAN 2221 #define CARL9170_HT_CAP \ 2222 { \ 2223 .ht_supported = true, \ 2224 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2225 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2226 IEEE80211_HT_CAP_SGI_40 | \ 2227 IEEE80211_HT_CAP_DSSSCCK40 | \ 2228 IEEE80211_HT_CAP_SM_PS, \ 2229 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2230 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2231 .mcs = { \ 2232 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2233 .rx_highest = cpu_to_le16(300), \ 2234 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2235 }, \ 2236 } 2237 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2238 do { \ 2239 queue.aifs = ai_fs; \ 2240 queue.cw_min = cwmin; \ 2241 queue.cw_max = cwmax; \ 2242 queue.txop = _txop; \ 2243 } while (0) 2244 #ifdef CONFIG_CARL9170_LEDS 2245 #endif 2246 /* LDV_COMMENT_END_PREP */ 2247 /* LDV_COMMENT_BEGIN_PREP */ 2248 #ifdef CONFIG_CARL9170_WPC 2249 #endif 2250 #define RW 8 2251 #define RB (sizeof(u32) * RW) 2252 #ifndef __CHECKER__ 2253 #endif 2254 #undef RW 2255 #undef RB 2256 #ifdef CONFIG_CARL9170_DEBUGFS 2257 #endif 2258 #ifdef CONFIG_CARL9170_LEDS 2259 #endif 2260 #ifdef CONFIG_CARL9170_WPC 2261 #endif 2262 #ifdef CONFIG_CARL9170_LEDS 2263 #endif 2264 #ifdef CONFIG_CARL9170_DEBUGFS 2265 #endif 2266 #ifdef CONFIG_CARL9170_WPC 2267 #endif 2268 /* LDV_COMMENT_END_PREP */ 2269 /* content: static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed)*/ 2270 /* LDV_COMMENT_BEGIN_PREP */ 2271 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2272 .bitrate = (_bitrate), \ 2273 .flags = (_flags), \ 2274 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2275 } 2276 #undef RATE 2277 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2278 #define carl9170_g_ratetable_size 12 2279 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2280 #define carl9170_a_ratetable_size 8 2281 #define CHAN(_freq, _idx) { \ 2282 .center_freq = (_freq), \ 2283 .hw_value = (_idx), \ 2284 .max_power = 18, \ 2285 } 2286 #undef CHAN 2287 #define CARL9170_HT_CAP \ 2288 { \ 2289 .ht_supported = true, \ 2290 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2291 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2292 IEEE80211_HT_CAP_SGI_40 | \ 2293 IEEE80211_HT_CAP_DSSSCCK40 | \ 2294 IEEE80211_HT_CAP_SM_PS, \ 2295 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2296 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2297 .mcs = { \ 2298 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2299 .rx_highest = cpu_to_le16(300), \ 2300 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2301 }, \ 2302 } 2303 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2304 do { \ 2305 queue.aifs = ai_fs; \ 2306 queue.cw_min = cwmin; \ 2307 queue.cw_max = cwmax; \ 2308 queue.txop = _txop; \ 2309 } while (0) 2310 #ifdef CONFIG_CARL9170_LEDS 2311 #endif 2312 /* LDV_COMMENT_END_PREP */ 2313 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_config" */ 2314 u32 var_carl9170_op_config_15_p1; 2315 /* LDV_COMMENT_BEGIN_PREP */ 2316 #ifdef CONFIG_CARL9170_WPC 2317 #endif 2318 #define RW 8 2319 #define RB (sizeof(u32) * RW) 2320 #ifndef __CHECKER__ 2321 #endif 2322 #undef RW 2323 #undef RB 2324 #ifdef CONFIG_CARL9170_DEBUGFS 2325 #endif 2326 #ifdef CONFIG_CARL9170_LEDS 2327 #endif 2328 #ifdef CONFIG_CARL9170_WPC 2329 #endif 2330 #ifdef CONFIG_CARL9170_LEDS 2331 #endif 2332 #ifdef CONFIG_CARL9170_DEBUGFS 2333 #endif 2334 #ifdef CONFIG_CARL9170_WPC 2335 #endif 2336 /* LDV_COMMENT_END_PREP */ 2337 /* content: static u64 carl9170_op_prepare_multicast(struct ieee80211_hw *hw, struct netdev_hw_addr_list *mc_list)*/ 2338 /* LDV_COMMENT_BEGIN_PREP */ 2339 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2340 .bitrate = (_bitrate), \ 2341 .flags = (_flags), \ 2342 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2343 } 2344 #undef RATE 2345 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2346 #define carl9170_g_ratetable_size 12 2347 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2348 #define carl9170_a_ratetable_size 8 2349 #define CHAN(_freq, _idx) { \ 2350 .center_freq = (_freq), \ 2351 .hw_value = (_idx), \ 2352 .max_power = 18, \ 2353 } 2354 #undef CHAN 2355 #define CARL9170_HT_CAP \ 2356 { \ 2357 .ht_supported = true, \ 2358 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2359 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2360 IEEE80211_HT_CAP_SGI_40 | \ 2361 IEEE80211_HT_CAP_DSSSCCK40 | \ 2362 IEEE80211_HT_CAP_SM_PS, \ 2363 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2364 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2365 .mcs = { \ 2366 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2367 .rx_highest = cpu_to_le16(300), \ 2368 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2369 }, \ 2370 } 2371 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2372 do { \ 2373 queue.aifs = ai_fs; \ 2374 queue.cw_min = cwmin; \ 2375 queue.cw_max = cwmax; \ 2376 queue.txop = _txop; \ 2377 } while (0) 2378 #ifdef CONFIG_CARL9170_LEDS 2379 #endif 2380 /* LDV_COMMENT_END_PREP */ 2381 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_prepare_multicast" */ 2382 struct netdev_hw_addr_list * var_group3; 2383 /* LDV_COMMENT_BEGIN_PREP */ 2384 #ifdef CONFIG_CARL9170_WPC 2385 #endif 2386 #define RW 8 2387 #define RB (sizeof(u32) * RW) 2388 #ifndef __CHECKER__ 2389 #endif 2390 #undef RW 2391 #undef RB 2392 #ifdef CONFIG_CARL9170_DEBUGFS 2393 #endif 2394 #ifdef CONFIG_CARL9170_LEDS 2395 #endif 2396 #ifdef CONFIG_CARL9170_WPC 2397 #endif 2398 #ifdef CONFIG_CARL9170_LEDS 2399 #endif 2400 #ifdef CONFIG_CARL9170_DEBUGFS 2401 #endif 2402 #ifdef CONFIG_CARL9170_WPC 2403 #endif 2404 /* LDV_COMMENT_END_PREP */ 2405 /* content: static void carl9170_op_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *new_flags, u64 multicast)*/ 2406 /* LDV_COMMENT_BEGIN_PREP */ 2407 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2408 .bitrate = (_bitrate), \ 2409 .flags = (_flags), \ 2410 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2411 } 2412 #undef RATE 2413 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2414 #define carl9170_g_ratetable_size 12 2415 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2416 #define carl9170_a_ratetable_size 8 2417 #define CHAN(_freq, _idx) { \ 2418 .center_freq = (_freq), \ 2419 .hw_value = (_idx), \ 2420 .max_power = 18, \ 2421 } 2422 #undef CHAN 2423 #define CARL9170_HT_CAP \ 2424 { \ 2425 .ht_supported = true, \ 2426 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2427 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2428 IEEE80211_HT_CAP_SGI_40 | \ 2429 IEEE80211_HT_CAP_DSSSCCK40 | \ 2430 IEEE80211_HT_CAP_SM_PS, \ 2431 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2432 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2433 .mcs = { \ 2434 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2435 .rx_highest = cpu_to_le16(300), \ 2436 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2437 }, \ 2438 } 2439 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2440 do { \ 2441 queue.aifs = ai_fs; \ 2442 queue.cw_min = cwmin; \ 2443 queue.cw_max = cwmax; \ 2444 queue.txop = _txop; \ 2445 } while (0) 2446 #ifdef CONFIG_CARL9170_LEDS 2447 #endif 2448 /* LDV_COMMENT_END_PREP */ 2449 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_configure_filter" */ 2450 unsigned int var_carl9170_op_configure_filter_17_p1; 2451 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_configure_filter" */ 2452 unsigned int * var_carl9170_op_configure_filter_17_p2; 2453 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_configure_filter" */ 2454 u64 var_carl9170_op_configure_filter_17_p3; 2455 /* LDV_COMMENT_BEGIN_PREP */ 2456 #ifdef CONFIG_CARL9170_WPC 2457 #endif 2458 #define RW 8 2459 #define RB (sizeof(u32) * RW) 2460 #ifndef __CHECKER__ 2461 #endif 2462 #undef RW 2463 #undef RB 2464 #ifdef CONFIG_CARL9170_DEBUGFS 2465 #endif 2466 #ifdef CONFIG_CARL9170_LEDS 2467 #endif 2468 #ifdef CONFIG_CARL9170_WPC 2469 #endif 2470 #ifdef CONFIG_CARL9170_LEDS 2471 #endif 2472 #ifdef CONFIG_CARL9170_DEBUGFS 2473 #endif 2474 #ifdef CONFIG_CARL9170_WPC 2475 #endif 2476 /* LDV_COMMENT_END_PREP */ 2477 /* content: static int carl9170_op_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *param)*/ 2478 /* LDV_COMMENT_BEGIN_PREP */ 2479 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2480 .bitrate = (_bitrate), \ 2481 .flags = (_flags), \ 2482 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2483 } 2484 #undef RATE 2485 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2486 #define carl9170_g_ratetable_size 12 2487 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2488 #define carl9170_a_ratetable_size 8 2489 #define CHAN(_freq, _idx) { \ 2490 .center_freq = (_freq), \ 2491 .hw_value = (_idx), \ 2492 .max_power = 18, \ 2493 } 2494 #undef CHAN 2495 #define CARL9170_HT_CAP \ 2496 { \ 2497 .ht_supported = true, \ 2498 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2499 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2500 IEEE80211_HT_CAP_SGI_40 | \ 2501 IEEE80211_HT_CAP_DSSSCCK40 | \ 2502 IEEE80211_HT_CAP_SM_PS, \ 2503 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2504 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2505 .mcs = { \ 2506 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2507 .rx_highest = cpu_to_le16(300), \ 2508 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2509 }, \ 2510 } 2511 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2512 do { \ 2513 queue.aifs = ai_fs; \ 2514 queue.cw_min = cwmin; \ 2515 queue.cw_max = cwmax; \ 2516 queue.txop = _txop; \ 2517 } while (0) 2518 #ifdef CONFIG_CARL9170_LEDS 2519 #endif 2520 /* LDV_COMMENT_END_PREP */ 2521 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_conf_tx" */ 2522 u16 var_carl9170_op_conf_tx_23_p1; 2523 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_conf_tx" */ 2524 const struct ieee80211_tx_queue_params * var_carl9170_op_conf_tx_23_p2; 2525 /* LDV_COMMENT_BEGIN_PREP */ 2526 #ifdef CONFIG_CARL9170_WPC 2527 #endif 2528 #define RW 8 2529 #define RB (sizeof(u32) * RW) 2530 #ifndef __CHECKER__ 2531 #endif 2532 #undef RW 2533 #undef RB 2534 #ifdef CONFIG_CARL9170_DEBUGFS 2535 #endif 2536 #ifdef CONFIG_CARL9170_LEDS 2537 #endif 2538 #ifdef CONFIG_CARL9170_WPC 2539 #endif 2540 #ifdef CONFIG_CARL9170_LEDS 2541 #endif 2542 #ifdef CONFIG_CARL9170_DEBUGFS 2543 #endif 2544 #ifdef CONFIG_CARL9170_WPC 2545 #endif 2546 /* LDV_COMMENT_END_PREP */ 2547 /* content: static void carl9170_op_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *bss_conf, u32 changed)*/ 2548 /* LDV_COMMENT_BEGIN_PREP */ 2549 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2550 .bitrate = (_bitrate), \ 2551 .flags = (_flags), \ 2552 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2553 } 2554 #undef RATE 2555 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2556 #define carl9170_g_ratetable_size 12 2557 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2558 #define carl9170_a_ratetable_size 8 2559 #define CHAN(_freq, _idx) { \ 2560 .center_freq = (_freq), \ 2561 .hw_value = (_idx), \ 2562 .max_power = 18, \ 2563 } 2564 #undef CHAN 2565 #define CARL9170_HT_CAP \ 2566 { \ 2567 .ht_supported = true, \ 2568 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2569 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2570 IEEE80211_HT_CAP_SGI_40 | \ 2571 IEEE80211_HT_CAP_DSSSCCK40 | \ 2572 IEEE80211_HT_CAP_SM_PS, \ 2573 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2574 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2575 .mcs = { \ 2576 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2577 .rx_highest = cpu_to_le16(300), \ 2578 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2579 }, \ 2580 } 2581 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2582 do { \ 2583 queue.aifs = ai_fs; \ 2584 queue.cw_min = cwmin; \ 2585 queue.cw_max = cwmax; \ 2586 queue.txop = _txop; \ 2587 } while (0) 2588 #ifdef CONFIG_CARL9170_LEDS 2589 #endif 2590 /* LDV_COMMENT_END_PREP */ 2591 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_bss_info_changed" */ 2592 struct ieee80211_bss_conf * var_carl9170_op_bss_info_changed_18_p2; 2593 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_bss_info_changed" */ 2594 u32 var_carl9170_op_bss_info_changed_18_p3; 2595 /* LDV_COMMENT_BEGIN_PREP */ 2596 #ifdef CONFIG_CARL9170_WPC 2597 #endif 2598 #define RW 8 2599 #define RB (sizeof(u32) * RW) 2600 #ifndef __CHECKER__ 2601 #endif 2602 #undef RW 2603 #undef RB 2604 #ifdef CONFIG_CARL9170_DEBUGFS 2605 #endif 2606 #ifdef CONFIG_CARL9170_LEDS 2607 #endif 2608 #ifdef CONFIG_CARL9170_WPC 2609 #endif 2610 #ifdef CONFIG_CARL9170_LEDS 2611 #endif 2612 #ifdef CONFIG_CARL9170_DEBUGFS 2613 #endif 2614 #ifdef CONFIG_CARL9170_WPC 2615 #endif 2616 /* LDV_COMMENT_END_PREP */ 2617 /* content: static u64 carl9170_op_get_tsf(struct ieee80211_hw *hw)*/ 2618 /* LDV_COMMENT_BEGIN_PREP */ 2619 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2620 .bitrate = (_bitrate), \ 2621 .flags = (_flags), \ 2622 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2623 } 2624 #undef RATE 2625 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2626 #define carl9170_g_ratetable_size 12 2627 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2628 #define carl9170_a_ratetable_size 8 2629 #define CHAN(_freq, _idx) { \ 2630 .center_freq = (_freq), \ 2631 .hw_value = (_idx), \ 2632 .max_power = 18, \ 2633 } 2634 #undef CHAN 2635 #define CARL9170_HT_CAP \ 2636 { \ 2637 .ht_supported = true, \ 2638 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2639 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2640 IEEE80211_HT_CAP_SGI_40 | \ 2641 IEEE80211_HT_CAP_DSSSCCK40 | \ 2642 IEEE80211_HT_CAP_SM_PS, \ 2643 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2644 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2645 .mcs = { \ 2646 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2647 .rx_highest = cpu_to_le16(300), \ 2648 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2649 }, \ 2650 } 2651 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2652 do { \ 2653 queue.aifs = ai_fs; \ 2654 queue.cw_min = cwmin; \ 2655 queue.cw_max = cwmax; \ 2656 queue.txop = _txop; \ 2657 } while (0) 2658 #ifdef CONFIG_CARL9170_LEDS 2659 #endif 2660 /* LDV_COMMENT_END_PREP */ 2661 /* LDV_COMMENT_BEGIN_PREP */ 2662 #ifdef CONFIG_CARL9170_WPC 2663 #endif 2664 #define RW 8 2665 #define RB (sizeof(u32) * RW) 2666 #ifndef __CHECKER__ 2667 #endif 2668 #undef RW 2669 #undef RB 2670 #ifdef CONFIG_CARL9170_DEBUGFS 2671 #endif 2672 #ifdef CONFIG_CARL9170_LEDS 2673 #endif 2674 #ifdef CONFIG_CARL9170_WPC 2675 #endif 2676 #ifdef CONFIG_CARL9170_LEDS 2677 #endif 2678 #ifdef CONFIG_CARL9170_DEBUGFS 2679 #endif 2680 #ifdef CONFIG_CARL9170_WPC 2681 #endif 2682 /* LDV_COMMENT_END_PREP */ 2683 /* content: static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *key)*/ 2684 /* LDV_COMMENT_BEGIN_PREP */ 2685 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2686 .bitrate = (_bitrate), \ 2687 .flags = (_flags), \ 2688 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2689 } 2690 #undef RATE 2691 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2692 #define carl9170_g_ratetable_size 12 2693 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2694 #define carl9170_a_ratetable_size 8 2695 #define CHAN(_freq, _idx) { \ 2696 .center_freq = (_freq), \ 2697 .hw_value = (_idx), \ 2698 .max_power = 18, \ 2699 } 2700 #undef CHAN 2701 #define CARL9170_HT_CAP \ 2702 { \ 2703 .ht_supported = true, \ 2704 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2705 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2706 IEEE80211_HT_CAP_SGI_40 | \ 2707 IEEE80211_HT_CAP_DSSSCCK40 | \ 2708 IEEE80211_HT_CAP_SM_PS, \ 2709 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2710 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2711 .mcs = { \ 2712 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2713 .rx_highest = cpu_to_le16(300), \ 2714 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2715 }, \ 2716 } 2717 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2718 do { \ 2719 queue.aifs = ai_fs; \ 2720 queue.cw_min = cwmin; \ 2721 queue.cw_max = cwmax; \ 2722 queue.txop = _txop; \ 2723 } while (0) 2724 #ifdef CONFIG_CARL9170_LEDS 2725 #endif 2726 /* LDV_COMMENT_END_PREP */ 2727 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_set_key" */ 2728 enum set_key_cmd var_carl9170_op_set_key_20_p1; 2729 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_set_key" */ 2730 struct ieee80211_vif * var_carl9170_op_set_key_20_p2; 2731 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_set_key" */ 2732 struct ieee80211_sta * var_carl9170_op_set_key_20_p3; 2733 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_set_key" */ 2734 struct ieee80211_key_conf * var_carl9170_op_set_key_20_p4; 2735 /* LDV_COMMENT_BEGIN_PREP */ 2736 #ifdef CONFIG_CARL9170_WPC 2737 #endif 2738 #define RW 8 2739 #define RB (sizeof(u32) * RW) 2740 #ifndef __CHECKER__ 2741 #endif 2742 #undef RW 2743 #undef RB 2744 #ifdef CONFIG_CARL9170_DEBUGFS 2745 #endif 2746 #ifdef CONFIG_CARL9170_LEDS 2747 #endif 2748 #ifdef CONFIG_CARL9170_WPC 2749 #endif 2750 #ifdef CONFIG_CARL9170_LEDS 2751 #endif 2752 #ifdef CONFIG_CARL9170_DEBUGFS 2753 #endif 2754 #ifdef CONFIG_CARL9170_WPC 2755 #endif 2756 /* LDV_COMMENT_END_PREP */ 2757 /* content: static int carl9170_op_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta)*/ 2758 /* LDV_COMMENT_BEGIN_PREP */ 2759 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2760 .bitrate = (_bitrate), \ 2761 .flags = (_flags), \ 2762 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2763 } 2764 #undef RATE 2765 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2766 #define carl9170_g_ratetable_size 12 2767 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2768 #define carl9170_a_ratetable_size 8 2769 #define CHAN(_freq, _idx) { \ 2770 .center_freq = (_freq), \ 2771 .hw_value = (_idx), \ 2772 .max_power = 18, \ 2773 } 2774 #undef CHAN 2775 #define CARL9170_HT_CAP \ 2776 { \ 2777 .ht_supported = true, \ 2778 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2779 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2780 IEEE80211_HT_CAP_SGI_40 | \ 2781 IEEE80211_HT_CAP_DSSSCCK40 | \ 2782 IEEE80211_HT_CAP_SM_PS, \ 2783 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2784 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2785 .mcs = { \ 2786 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2787 .rx_highest = cpu_to_le16(300), \ 2788 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2789 }, \ 2790 } 2791 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2792 do { \ 2793 queue.aifs = ai_fs; \ 2794 queue.cw_min = cwmin; \ 2795 queue.cw_max = cwmax; \ 2796 queue.txop = _txop; \ 2797 } while (0) 2798 #ifdef CONFIG_CARL9170_LEDS 2799 #endif 2800 /* LDV_COMMENT_END_PREP */ 2801 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_sta_add" */ 2802 struct ieee80211_sta * var_carl9170_op_sta_add_21_p2; 2803 /* LDV_COMMENT_BEGIN_PREP */ 2804 #ifdef CONFIG_CARL9170_WPC 2805 #endif 2806 #define RW 8 2807 #define RB (sizeof(u32) * RW) 2808 #ifndef __CHECKER__ 2809 #endif 2810 #undef RW 2811 #undef RB 2812 #ifdef CONFIG_CARL9170_DEBUGFS 2813 #endif 2814 #ifdef CONFIG_CARL9170_LEDS 2815 #endif 2816 #ifdef CONFIG_CARL9170_WPC 2817 #endif 2818 #ifdef CONFIG_CARL9170_LEDS 2819 #endif 2820 #ifdef CONFIG_CARL9170_DEBUGFS 2821 #endif 2822 #ifdef CONFIG_CARL9170_WPC 2823 #endif 2824 /* LDV_COMMENT_END_PREP */ 2825 /* content: static int carl9170_op_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta)*/ 2826 /* LDV_COMMENT_BEGIN_PREP */ 2827 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2828 .bitrate = (_bitrate), \ 2829 .flags = (_flags), \ 2830 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2831 } 2832 #undef RATE 2833 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2834 #define carl9170_g_ratetable_size 12 2835 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2836 #define carl9170_a_ratetable_size 8 2837 #define CHAN(_freq, _idx) { \ 2838 .center_freq = (_freq), \ 2839 .hw_value = (_idx), \ 2840 .max_power = 18, \ 2841 } 2842 #undef CHAN 2843 #define CARL9170_HT_CAP \ 2844 { \ 2845 .ht_supported = true, \ 2846 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2847 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2848 IEEE80211_HT_CAP_SGI_40 | \ 2849 IEEE80211_HT_CAP_DSSSCCK40 | \ 2850 IEEE80211_HT_CAP_SM_PS, \ 2851 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2852 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2853 .mcs = { \ 2854 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2855 .rx_highest = cpu_to_le16(300), \ 2856 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2857 }, \ 2858 } 2859 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2860 do { \ 2861 queue.aifs = ai_fs; \ 2862 queue.cw_min = cwmin; \ 2863 queue.cw_max = cwmax; \ 2864 queue.txop = _txop; \ 2865 } while (0) 2866 #ifdef CONFIG_CARL9170_LEDS 2867 #endif 2868 /* LDV_COMMENT_END_PREP */ 2869 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_sta_remove" */ 2870 struct ieee80211_sta * var_carl9170_op_sta_remove_22_p2; 2871 /* LDV_COMMENT_BEGIN_PREP */ 2872 #ifdef CONFIG_CARL9170_WPC 2873 #endif 2874 #define RW 8 2875 #define RB (sizeof(u32) * RW) 2876 #ifndef __CHECKER__ 2877 #endif 2878 #undef RW 2879 #undef RB 2880 #ifdef CONFIG_CARL9170_DEBUGFS 2881 #endif 2882 #ifdef CONFIG_CARL9170_LEDS 2883 #endif 2884 #ifdef CONFIG_CARL9170_WPC 2885 #endif 2886 #ifdef CONFIG_CARL9170_LEDS 2887 #endif 2888 #ifdef CONFIG_CARL9170_DEBUGFS 2889 #endif 2890 #ifdef CONFIG_CARL9170_WPC 2891 #endif 2892 /* LDV_COMMENT_END_PREP */ 2893 /* content: static void carl9170_op_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta)*/ 2894 /* LDV_COMMENT_BEGIN_PREP */ 2895 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2896 .bitrate = (_bitrate), \ 2897 .flags = (_flags), \ 2898 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2899 } 2900 #undef RATE 2901 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2902 #define carl9170_g_ratetable_size 12 2903 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2904 #define carl9170_a_ratetable_size 8 2905 #define CHAN(_freq, _idx) { \ 2906 .center_freq = (_freq), \ 2907 .hw_value = (_idx), \ 2908 .max_power = 18, \ 2909 } 2910 #undef CHAN 2911 #define CARL9170_HT_CAP \ 2912 { \ 2913 .ht_supported = true, \ 2914 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2915 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2916 IEEE80211_HT_CAP_SGI_40 | \ 2917 IEEE80211_HT_CAP_DSSSCCK40 | \ 2918 IEEE80211_HT_CAP_SM_PS, \ 2919 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2920 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2921 .mcs = { \ 2922 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2923 .rx_highest = cpu_to_le16(300), \ 2924 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2925 }, \ 2926 } 2927 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2928 do { \ 2929 queue.aifs = ai_fs; \ 2930 queue.cw_min = cwmin; \ 2931 queue.cw_max = cwmax; \ 2932 queue.txop = _txop; \ 2933 } while (0) 2934 #ifdef CONFIG_CARL9170_LEDS 2935 #endif 2936 #ifdef CONFIG_CARL9170_WPC 2937 #endif 2938 /* LDV_COMMENT_END_PREP */ 2939 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_sta_notify" */ 2940 enum sta_notify_cmd var_carl9170_op_sta_notify_30_p2; 2941 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_sta_notify" */ 2942 struct ieee80211_sta * var_carl9170_op_sta_notify_30_p3; 2943 /* LDV_COMMENT_BEGIN_PREP */ 2944 #define RW 8 2945 #define RB (sizeof(u32) * RW) 2946 #ifndef __CHECKER__ 2947 #endif 2948 #undef RW 2949 #undef RB 2950 #ifdef CONFIG_CARL9170_DEBUGFS 2951 #endif 2952 #ifdef CONFIG_CARL9170_LEDS 2953 #endif 2954 #ifdef CONFIG_CARL9170_WPC 2955 #endif 2956 #ifdef CONFIG_CARL9170_LEDS 2957 #endif 2958 #ifdef CONFIG_CARL9170_DEBUGFS 2959 #endif 2960 #ifdef CONFIG_CARL9170_WPC 2961 #endif 2962 /* LDV_COMMENT_END_PREP */ 2963 /* content: static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)*/ 2964 /* LDV_COMMENT_BEGIN_PREP */ 2965 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 2966 .bitrate = (_bitrate), \ 2967 .flags = (_flags), \ 2968 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 2969 } 2970 #undef RATE 2971 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 2972 #define carl9170_g_ratetable_size 12 2973 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 2974 #define carl9170_a_ratetable_size 8 2975 #define CHAN(_freq, _idx) { \ 2976 .center_freq = (_freq), \ 2977 .hw_value = (_idx), \ 2978 .max_power = 18, \ 2979 } 2980 #undef CHAN 2981 #define CARL9170_HT_CAP \ 2982 { \ 2983 .ht_supported = true, \ 2984 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 2985 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 2986 IEEE80211_HT_CAP_SGI_40 | \ 2987 IEEE80211_HT_CAP_DSSSCCK40 | \ 2988 IEEE80211_HT_CAP_SM_PS, \ 2989 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 2990 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 2991 .mcs = { \ 2992 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 2993 .rx_highest = cpu_to_le16(300), \ 2994 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 2995 }, \ 2996 } 2997 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 2998 do { \ 2999 queue.aifs = ai_fs; \ 3000 queue.cw_min = cwmin; \ 3001 queue.cw_max = cwmax; \ 3002 queue.txop = _txop; \ 3003 } while (0) 3004 #ifdef CONFIG_CARL9170_LEDS 3005 #endif 3006 #ifdef CONFIG_CARL9170_WPC 3007 #endif 3008 /* LDV_COMMENT_END_PREP */ 3009 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_get_survey" */ 3010 int var_carl9170_op_get_survey_27_p1; 3011 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_get_survey" */ 3012 struct survey_info * var_carl9170_op_get_survey_27_p2; 3013 /* LDV_COMMENT_BEGIN_PREP */ 3014 #define RW 8 3015 #define RB (sizeof(u32) * RW) 3016 #ifndef __CHECKER__ 3017 #endif 3018 #undef RW 3019 #undef RB 3020 #ifdef CONFIG_CARL9170_DEBUGFS 3021 #endif 3022 #ifdef CONFIG_CARL9170_LEDS 3023 #endif 3024 #ifdef CONFIG_CARL9170_WPC 3025 #endif 3026 #ifdef CONFIG_CARL9170_LEDS 3027 #endif 3028 #ifdef CONFIG_CARL9170_DEBUGFS 3029 #endif 3030 #ifdef CONFIG_CARL9170_WPC 3031 #endif 3032 /* LDV_COMMENT_END_PREP */ 3033 /* content: static int carl9170_op_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats)*/ 3034 /* LDV_COMMENT_BEGIN_PREP */ 3035 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3036 .bitrate = (_bitrate), \ 3037 .flags = (_flags), \ 3038 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3039 } 3040 #undef RATE 3041 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3042 #define carl9170_g_ratetable_size 12 3043 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3044 #define carl9170_a_ratetable_size 8 3045 #define CHAN(_freq, _idx) { \ 3046 .center_freq = (_freq), \ 3047 .hw_value = (_idx), \ 3048 .max_power = 18, \ 3049 } 3050 #undef CHAN 3051 #define CARL9170_HT_CAP \ 3052 { \ 3053 .ht_supported = true, \ 3054 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3055 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3056 IEEE80211_HT_CAP_SGI_40 | \ 3057 IEEE80211_HT_CAP_DSSSCCK40 | \ 3058 IEEE80211_HT_CAP_SM_PS, \ 3059 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3060 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3061 .mcs = { \ 3062 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3063 .rx_highest = cpu_to_le16(300), \ 3064 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3065 }, \ 3066 } 3067 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3068 do { \ 3069 queue.aifs = ai_fs; \ 3070 queue.cw_min = cwmin; \ 3071 queue.cw_max = cwmax; \ 3072 queue.txop = _txop; \ 3073 } while (0) 3074 #ifdef CONFIG_CARL9170_LEDS 3075 #endif 3076 #ifdef CONFIG_CARL9170_WPC 3077 #endif 3078 /* LDV_COMMENT_END_PREP */ 3079 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_get_stats" */ 3080 struct ieee80211_low_level_stats * var_group4; 3081 /* LDV_COMMENT_BEGIN_PREP */ 3082 #define RW 8 3083 #define RB (sizeof(u32) * RW) 3084 #ifndef __CHECKER__ 3085 #endif 3086 #undef RW 3087 #undef RB 3088 #ifdef CONFIG_CARL9170_DEBUGFS 3089 #endif 3090 #ifdef CONFIG_CARL9170_LEDS 3091 #endif 3092 #ifdef CONFIG_CARL9170_WPC 3093 #endif 3094 #ifdef CONFIG_CARL9170_LEDS 3095 #endif 3096 #ifdef CONFIG_CARL9170_DEBUGFS 3097 #endif 3098 #ifdef CONFIG_CARL9170_WPC 3099 #endif 3100 /* LDV_COMMENT_END_PREP */ 3101 /* content: static int carl9170_op_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn)*/ 3102 /* LDV_COMMENT_BEGIN_PREP */ 3103 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3104 .bitrate = (_bitrate), \ 3105 .flags = (_flags), \ 3106 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3107 } 3108 #undef RATE 3109 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3110 #define carl9170_g_ratetable_size 12 3111 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3112 #define carl9170_a_ratetable_size 8 3113 #define CHAN(_freq, _idx) { \ 3114 .center_freq = (_freq), \ 3115 .hw_value = (_idx), \ 3116 .max_power = 18, \ 3117 } 3118 #undef CHAN 3119 #define CARL9170_HT_CAP \ 3120 { \ 3121 .ht_supported = true, \ 3122 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3123 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3124 IEEE80211_HT_CAP_SGI_40 | \ 3125 IEEE80211_HT_CAP_DSSSCCK40 | \ 3126 IEEE80211_HT_CAP_SM_PS, \ 3127 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3128 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3129 .mcs = { \ 3130 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3131 .rx_highest = cpu_to_le16(300), \ 3132 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3133 }, \ 3134 } 3135 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3136 do { \ 3137 queue.aifs = ai_fs; \ 3138 queue.cw_min = cwmin; \ 3139 queue.cw_max = cwmax; \ 3140 queue.txop = _txop; \ 3141 } while (0) 3142 #ifdef CONFIG_CARL9170_LEDS 3143 #endif 3144 /* LDV_COMMENT_END_PREP */ 3145 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_ampdu_action" */ 3146 enum ieee80211_ampdu_mlme_action var_carl9170_op_ampdu_action_25_p2; 3147 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_ampdu_action" */ 3148 struct ieee80211_sta * var_carl9170_op_ampdu_action_25_p3; 3149 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_ampdu_action" */ 3150 u16 var_carl9170_op_ampdu_action_25_p4; 3151 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "carl9170_op_ampdu_action" */ 3152 u16 * var_carl9170_op_ampdu_action_25_p5; 3153 /* LDV_COMMENT_BEGIN_PREP */ 3154 #ifdef CONFIG_CARL9170_WPC 3155 #endif 3156 #define RW 8 3157 #define RB (sizeof(u32) * RW) 3158 #ifndef __CHECKER__ 3159 #endif 3160 #undef RW 3161 #undef RB 3162 #ifdef CONFIG_CARL9170_DEBUGFS 3163 #endif 3164 #ifdef CONFIG_CARL9170_LEDS 3165 #endif 3166 #ifdef CONFIG_CARL9170_WPC 3167 #endif 3168 #ifdef CONFIG_CARL9170_LEDS 3169 #endif 3170 #ifdef CONFIG_CARL9170_DEBUGFS 3171 #endif 3172 #ifdef CONFIG_CARL9170_WPC 3173 #endif 3174 /* LDV_COMMENT_END_PREP */ 3175 3176 3177 3178 3179 /* LDV_COMMENT_END_VARIABLE_DECLARATION_PART */ 3180 /* LDV_COMMENT_BEGIN_VARIABLE_INITIALIZING_PART */ 3181 /*============================= VARIABLE INITIALIZING PART =============================*/ 3182 LDV_IN_INTERRUPT=1; 3183 3184 3185 3186 3187 /* LDV_COMMENT_END_VARIABLE_INITIALIZING_PART */ 3188 /* LDV_COMMENT_BEGIN_FUNCTION_CALL_SECTION */ 3189 /*============================= FUNCTION CALL SECTION =============================*/ 3190 /* LDV_COMMENT_FUNCTION_CALL Initialize LDV model. */ 3191 ldv_initialize(); 3192 3193 3194 3195 while( nondet_int() 3196 ) { 3197 3198 switch(nondet_int()) { 3199 3200 case 0: { 3201 3202 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3203 3204 3205 /* content: static int carl9170_op_start(struct ieee80211_hw *hw)*/ 3206 /* LDV_COMMENT_BEGIN_PREP */ 3207 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3208 .bitrate = (_bitrate), \ 3209 .flags = (_flags), \ 3210 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3211 } 3212 #undef RATE 3213 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3214 #define carl9170_g_ratetable_size 12 3215 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3216 #define carl9170_a_ratetable_size 8 3217 #define CHAN(_freq, _idx) { \ 3218 .center_freq = (_freq), \ 3219 .hw_value = (_idx), \ 3220 .max_power = 18, \ 3221 } 3222 #undef CHAN 3223 #define CARL9170_HT_CAP \ 3224 { \ 3225 .ht_supported = true, \ 3226 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3227 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3228 IEEE80211_HT_CAP_SGI_40 | \ 3229 IEEE80211_HT_CAP_DSSSCCK40 | \ 3230 IEEE80211_HT_CAP_SM_PS, \ 3231 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3232 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3233 .mcs = { \ 3234 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3235 .rx_highest = cpu_to_le16(300), \ 3236 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3237 }, \ 3238 } 3239 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3240 do { \ 3241 queue.aifs = ai_fs; \ 3242 queue.cw_min = cwmin; \ 3243 queue.cw_max = cwmax; \ 3244 queue.txop = _txop; \ 3245 } while (0) 3246 /* LDV_COMMENT_END_PREP */ 3247 /* LDV_COMMENT_FUNCTION_CALL Function from field "start" from driver structure with callbacks "carl9170_ops" */ 3248 carl9170_op_start( var_group1); 3249 /* LDV_COMMENT_BEGIN_PREP */ 3250 #ifdef CONFIG_CARL9170_LEDS 3251 #endif 3252 #ifdef CONFIG_CARL9170_WPC 3253 #endif 3254 #define RW 8 3255 #define RB (sizeof(u32) * RW) 3256 #ifndef __CHECKER__ 3257 #endif 3258 #undef RW 3259 #undef RB 3260 #ifdef CONFIG_CARL9170_DEBUGFS 3261 #endif 3262 #ifdef CONFIG_CARL9170_LEDS 3263 #endif 3264 #ifdef CONFIG_CARL9170_WPC 3265 #endif 3266 #ifdef CONFIG_CARL9170_LEDS 3267 #endif 3268 #ifdef CONFIG_CARL9170_DEBUGFS 3269 #endif 3270 #ifdef CONFIG_CARL9170_WPC 3271 #endif 3272 /* LDV_COMMENT_END_PREP */ 3273 3274 3275 3276 3277 } 3278 3279 break; 3280 case 1: { 3281 3282 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3283 3284 3285 /* content: static void carl9170_op_stop(struct ieee80211_hw *hw)*/ 3286 /* LDV_COMMENT_BEGIN_PREP */ 3287 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3288 .bitrate = (_bitrate), \ 3289 .flags = (_flags), \ 3290 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3291 } 3292 #undef RATE 3293 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3294 #define carl9170_g_ratetable_size 12 3295 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3296 #define carl9170_a_ratetable_size 8 3297 #define CHAN(_freq, _idx) { \ 3298 .center_freq = (_freq), \ 3299 .hw_value = (_idx), \ 3300 .max_power = 18, \ 3301 } 3302 #undef CHAN 3303 #define CARL9170_HT_CAP \ 3304 { \ 3305 .ht_supported = true, \ 3306 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3307 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3308 IEEE80211_HT_CAP_SGI_40 | \ 3309 IEEE80211_HT_CAP_DSSSCCK40 | \ 3310 IEEE80211_HT_CAP_SM_PS, \ 3311 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3312 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3313 .mcs = { \ 3314 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3315 .rx_highest = cpu_to_le16(300), \ 3316 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3317 }, \ 3318 } 3319 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3320 do { \ 3321 queue.aifs = ai_fs; \ 3322 queue.cw_min = cwmin; \ 3323 queue.cw_max = cwmax; \ 3324 queue.txop = _txop; \ 3325 } while (0) 3326 #ifdef CONFIG_CARL9170_LEDS 3327 #endif 3328 /* LDV_COMMENT_END_PREP */ 3329 /* LDV_COMMENT_FUNCTION_CALL Function from field "stop" from driver structure with callbacks "carl9170_ops" */ 3330 carl9170_op_stop( var_group1); 3331 /* LDV_COMMENT_BEGIN_PREP */ 3332 #ifdef CONFIG_CARL9170_WPC 3333 #endif 3334 #define RW 8 3335 #define RB (sizeof(u32) * RW) 3336 #ifndef __CHECKER__ 3337 #endif 3338 #undef RW 3339 #undef RB 3340 #ifdef CONFIG_CARL9170_DEBUGFS 3341 #endif 3342 #ifdef CONFIG_CARL9170_LEDS 3343 #endif 3344 #ifdef CONFIG_CARL9170_WPC 3345 #endif 3346 #ifdef CONFIG_CARL9170_LEDS 3347 #endif 3348 #ifdef CONFIG_CARL9170_DEBUGFS 3349 #endif 3350 #ifdef CONFIG_CARL9170_WPC 3351 #endif 3352 /* LDV_COMMENT_END_PREP */ 3353 3354 3355 3356 3357 } 3358 3359 break; 3360 case 2: { 3361 3362 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3363 3364 3365 /* content: static void carl9170_op_flush(struct ieee80211_hw *hw, bool drop)*/ 3366 /* LDV_COMMENT_BEGIN_PREP */ 3367 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3368 .bitrate = (_bitrate), \ 3369 .flags = (_flags), \ 3370 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3371 } 3372 #undef RATE 3373 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3374 #define carl9170_g_ratetable_size 12 3375 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3376 #define carl9170_a_ratetable_size 8 3377 #define CHAN(_freq, _idx) { \ 3378 .center_freq = (_freq), \ 3379 .hw_value = (_idx), \ 3380 .max_power = 18, \ 3381 } 3382 #undef CHAN 3383 #define CARL9170_HT_CAP \ 3384 { \ 3385 .ht_supported = true, \ 3386 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3387 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3388 IEEE80211_HT_CAP_SGI_40 | \ 3389 IEEE80211_HT_CAP_DSSSCCK40 | \ 3390 IEEE80211_HT_CAP_SM_PS, \ 3391 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3392 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3393 .mcs = { \ 3394 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3395 .rx_highest = cpu_to_le16(300), \ 3396 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3397 }, \ 3398 } 3399 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3400 do { \ 3401 queue.aifs = ai_fs; \ 3402 queue.cw_min = cwmin; \ 3403 queue.cw_max = cwmax; \ 3404 queue.txop = _txop; \ 3405 } while (0) 3406 #ifdef CONFIG_CARL9170_LEDS 3407 #endif 3408 #ifdef CONFIG_CARL9170_WPC 3409 #endif 3410 /* LDV_COMMENT_END_PREP */ 3411 /* LDV_COMMENT_FUNCTION_CALL Function from field "flush" from driver structure with callbacks "carl9170_ops" */ 3412 carl9170_op_flush( var_group1, var_carl9170_op_flush_28_p1); 3413 /* LDV_COMMENT_BEGIN_PREP */ 3414 #define RW 8 3415 #define RB (sizeof(u32) * RW) 3416 #ifndef __CHECKER__ 3417 #endif 3418 #undef RW 3419 #undef RB 3420 #ifdef CONFIG_CARL9170_DEBUGFS 3421 #endif 3422 #ifdef CONFIG_CARL9170_LEDS 3423 #endif 3424 #ifdef CONFIG_CARL9170_WPC 3425 #endif 3426 #ifdef CONFIG_CARL9170_LEDS 3427 #endif 3428 #ifdef CONFIG_CARL9170_DEBUGFS 3429 #endif 3430 #ifdef CONFIG_CARL9170_WPC 3431 #endif 3432 /* LDV_COMMENT_END_PREP */ 3433 3434 3435 3436 3437 } 3438 3439 break; 3440 case 3: { 3441 3442 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3443 3444 3445 /* content: static int carl9170_op_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)*/ 3446 /* LDV_COMMENT_BEGIN_PREP */ 3447 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3448 .bitrate = (_bitrate), \ 3449 .flags = (_flags), \ 3450 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3451 } 3452 #undef RATE 3453 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3454 #define carl9170_g_ratetable_size 12 3455 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3456 #define carl9170_a_ratetable_size 8 3457 #define CHAN(_freq, _idx) { \ 3458 .center_freq = (_freq), \ 3459 .hw_value = (_idx), \ 3460 .max_power = 18, \ 3461 } 3462 #undef CHAN 3463 #define CARL9170_HT_CAP \ 3464 { \ 3465 .ht_supported = true, \ 3466 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3467 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3468 IEEE80211_HT_CAP_SGI_40 | \ 3469 IEEE80211_HT_CAP_DSSSCCK40 | \ 3470 IEEE80211_HT_CAP_SM_PS, \ 3471 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3472 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3473 .mcs = { \ 3474 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3475 .rx_highest = cpu_to_le16(300), \ 3476 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3477 }, \ 3478 } 3479 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3480 do { \ 3481 queue.aifs = ai_fs; \ 3482 queue.cw_min = cwmin; \ 3483 queue.cw_max = cwmax; \ 3484 queue.txop = _txop; \ 3485 } while (0) 3486 #ifdef CONFIG_CARL9170_LEDS 3487 #endif 3488 /* LDV_COMMENT_END_PREP */ 3489 /* LDV_COMMENT_FUNCTION_CALL Function from field "add_interface" from driver structure with callbacks "carl9170_ops" */ 3490 carl9170_op_add_interface( var_group1, var_group2); 3491 /* LDV_COMMENT_BEGIN_PREP */ 3492 #ifdef CONFIG_CARL9170_WPC 3493 #endif 3494 #define RW 8 3495 #define RB (sizeof(u32) * RW) 3496 #ifndef __CHECKER__ 3497 #endif 3498 #undef RW 3499 #undef RB 3500 #ifdef CONFIG_CARL9170_DEBUGFS 3501 #endif 3502 #ifdef CONFIG_CARL9170_LEDS 3503 #endif 3504 #ifdef CONFIG_CARL9170_WPC 3505 #endif 3506 #ifdef CONFIG_CARL9170_LEDS 3507 #endif 3508 #ifdef CONFIG_CARL9170_DEBUGFS 3509 #endif 3510 #ifdef CONFIG_CARL9170_WPC 3511 #endif 3512 /* LDV_COMMENT_END_PREP */ 3513 3514 3515 3516 3517 } 3518 3519 break; 3520 case 4: { 3521 3522 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3523 3524 3525 /* content: static void carl9170_op_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)*/ 3526 /* LDV_COMMENT_BEGIN_PREP */ 3527 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3528 .bitrate = (_bitrate), \ 3529 .flags = (_flags), \ 3530 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3531 } 3532 #undef RATE 3533 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3534 #define carl9170_g_ratetable_size 12 3535 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3536 #define carl9170_a_ratetable_size 8 3537 #define CHAN(_freq, _idx) { \ 3538 .center_freq = (_freq), \ 3539 .hw_value = (_idx), \ 3540 .max_power = 18, \ 3541 } 3542 #undef CHAN 3543 #define CARL9170_HT_CAP \ 3544 { \ 3545 .ht_supported = true, \ 3546 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3547 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3548 IEEE80211_HT_CAP_SGI_40 | \ 3549 IEEE80211_HT_CAP_DSSSCCK40 | \ 3550 IEEE80211_HT_CAP_SM_PS, \ 3551 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3552 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3553 .mcs = { \ 3554 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3555 .rx_highest = cpu_to_le16(300), \ 3556 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3557 }, \ 3558 } 3559 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3560 do { \ 3561 queue.aifs = ai_fs; \ 3562 queue.cw_min = cwmin; \ 3563 queue.cw_max = cwmax; \ 3564 queue.txop = _txop; \ 3565 } while (0) 3566 #ifdef CONFIG_CARL9170_LEDS 3567 #endif 3568 /* LDV_COMMENT_END_PREP */ 3569 /* LDV_COMMENT_FUNCTION_CALL Function from field "remove_interface" from driver structure with callbacks "carl9170_ops" */ 3570 carl9170_op_remove_interface( var_group1, var_group2); 3571 /* LDV_COMMENT_BEGIN_PREP */ 3572 #ifdef CONFIG_CARL9170_WPC 3573 #endif 3574 #define RW 8 3575 #define RB (sizeof(u32) * RW) 3576 #ifndef __CHECKER__ 3577 #endif 3578 #undef RW 3579 #undef RB 3580 #ifdef CONFIG_CARL9170_DEBUGFS 3581 #endif 3582 #ifdef CONFIG_CARL9170_LEDS 3583 #endif 3584 #ifdef CONFIG_CARL9170_WPC 3585 #endif 3586 #ifdef CONFIG_CARL9170_LEDS 3587 #endif 3588 #ifdef CONFIG_CARL9170_DEBUGFS 3589 #endif 3590 #ifdef CONFIG_CARL9170_WPC 3591 #endif 3592 /* LDV_COMMENT_END_PREP */ 3593 3594 3595 3596 3597 } 3598 3599 break; 3600 case 5: { 3601 3602 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3603 3604 3605 /* content: static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed)*/ 3606 /* LDV_COMMENT_BEGIN_PREP */ 3607 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3608 .bitrate = (_bitrate), \ 3609 .flags = (_flags), \ 3610 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3611 } 3612 #undef RATE 3613 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3614 #define carl9170_g_ratetable_size 12 3615 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3616 #define carl9170_a_ratetable_size 8 3617 #define CHAN(_freq, _idx) { \ 3618 .center_freq = (_freq), \ 3619 .hw_value = (_idx), \ 3620 .max_power = 18, \ 3621 } 3622 #undef CHAN 3623 #define CARL9170_HT_CAP \ 3624 { \ 3625 .ht_supported = true, \ 3626 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3627 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3628 IEEE80211_HT_CAP_SGI_40 | \ 3629 IEEE80211_HT_CAP_DSSSCCK40 | \ 3630 IEEE80211_HT_CAP_SM_PS, \ 3631 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3632 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3633 .mcs = { \ 3634 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3635 .rx_highest = cpu_to_le16(300), \ 3636 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3637 }, \ 3638 } 3639 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3640 do { \ 3641 queue.aifs = ai_fs; \ 3642 queue.cw_min = cwmin; \ 3643 queue.cw_max = cwmax; \ 3644 queue.txop = _txop; \ 3645 } while (0) 3646 #ifdef CONFIG_CARL9170_LEDS 3647 #endif 3648 /* LDV_COMMENT_END_PREP */ 3649 /* LDV_COMMENT_FUNCTION_CALL Function from field "config" from driver structure with callbacks "carl9170_ops" */ 3650 carl9170_op_config( var_group1, var_carl9170_op_config_15_p1); 3651 /* LDV_COMMENT_BEGIN_PREP */ 3652 #ifdef CONFIG_CARL9170_WPC 3653 #endif 3654 #define RW 8 3655 #define RB (sizeof(u32) * RW) 3656 #ifndef __CHECKER__ 3657 #endif 3658 #undef RW 3659 #undef RB 3660 #ifdef CONFIG_CARL9170_DEBUGFS 3661 #endif 3662 #ifdef CONFIG_CARL9170_LEDS 3663 #endif 3664 #ifdef CONFIG_CARL9170_WPC 3665 #endif 3666 #ifdef CONFIG_CARL9170_LEDS 3667 #endif 3668 #ifdef CONFIG_CARL9170_DEBUGFS 3669 #endif 3670 #ifdef CONFIG_CARL9170_WPC 3671 #endif 3672 /* LDV_COMMENT_END_PREP */ 3673 3674 3675 3676 3677 } 3678 3679 break; 3680 case 6: { 3681 3682 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3683 3684 3685 /* content: static u64 carl9170_op_prepare_multicast(struct ieee80211_hw *hw, struct netdev_hw_addr_list *mc_list)*/ 3686 /* LDV_COMMENT_BEGIN_PREP */ 3687 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3688 .bitrate = (_bitrate), \ 3689 .flags = (_flags), \ 3690 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3691 } 3692 #undef RATE 3693 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3694 #define carl9170_g_ratetable_size 12 3695 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3696 #define carl9170_a_ratetable_size 8 3697 #define CHAN(_freq, _idx) { \ 3698 .center_freq = (_freq), \ 3699 .hw_value = (_idx), \ 3700 .max_power = 18, \ 3701 } 3702 #undef CHAN 3703 #define CARL9170_HT_CAP \ 3704 { \ 3705 .ht_supported = true, \ 3706 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3707 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3708 IEEE80211_HT_CAP_SGI_40 | \ 3709 IEEE80211_HT_CAP_DSSSCCK40 | \ 3710 IEEE80211_HT_CAP_SM_PS, \ 3711 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3712 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3713 .mcs = { \ 3714 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3715 .rx_highest = cpu_to_le16(300), \ 3716 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3717 }, \ 3718 } 3719 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3720 do { \ 3721 queue.aifs = ai_fs; \ 3722 queue.cw_min = cwmin; \ 3723 queue.cw_max = cwmax; \ 3724 queue.txop = _txop; \ 3725 } while (0) 3726 #ifdef CONFIG_CARL9170_LEDS 3727 #endif 3728 /* LDV_COMMENT_END_PREP */ 3729 /* LDV_COMMENT_FUNCTION_CALL Function from field "prepare_multicast" from driver structure with callbacks "carl9170_ops" */ 3730 carl9170_op_prepare_multicast( var_group1, var_group3); 3731 /* LDV_COMMENT_BEGIN_PREP */ 3732 #ifdef CONFIG_CARL9170_WPC 3733 #endif 3734 #define RW 8 3735 #define RB (sizeof(u32) * RW) 3736 #ifndef __CHECKER__ 3737 #endif 3738 #undef RW 3739 #undef RB 3740 #ifdef CONFIG_CARL9170_DEBUGFS 3741 #endif 3742 #ifdef CONFIG_CARL9170_LEDS 3743 #endif 3744 #ifdef CONFIG_CARL9170_WPC 3745 #endif 3746 #ifdef CONFIG_CARL9170_LEDS 3747 #endif 3748 #ifdef CONFIG_CARL9170_DEBUGFS 3749 #endif 3750 #ifdef CONFIG_CARL9170_WPC 3751 #endif 3752 /* LDV_COMMENT_END_PREP */ 3753 3754 3755 3756 3757 } 3758 3759 break; 3760 case 7: { 3761 3762 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3763 3764 3765 /* content: static void carl9170_op_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *new_flags, u64 multicast)*/ 3766 /* LDV_COMMENT_BEGIN_PREP */ 3767 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3768 .bitrate = (_bitrate), \ 3769 .flags = (_flags), \ 3770 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3771 } 3772 #undef RATE 3773 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3774 #define carl9170_g_ratetable_size 12 3775 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3776 #define carl9170_a_ratetable_size 8 3777 #define CHAN(_freq, _idx) { \ 3778 .center_freq = (_freq), \ 3779 .hw_value = (_idx), \ 3780 .max_power = 18, \ 3781 } 3782 #undef CHAN 3783 #define CARL9170_HT_CAP \ 3784 { \ 3785 .ht_supported = true, \ 3786 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3787 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3788 IEEE80211_HT_CAP_SGI_40 | \ 3789 IEEE80211_HT_CAP_DSSSCCK40 | \ 3790 IEEE80211_HT_CAP_SM_PS, \ 3791 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3792 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3793 .mcs = { \ 3794 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3795 .rx_highest = cpu_to_le16(300), \ 3796 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3797 }, \ 3798 } 3799 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3800 do { \ 3801 queue.aifs = ai_fs; \ 3802 queue.cw_min = cwmin; \ 3803 queue.cw_max = cwmax; \ 3804 queue.txop = _txop; \ 3805 } while (0) 3806 #ifdef CONFIG_CARL9170_LEDS 3807 #endif 3808 /* LDV_COMMENT_END_PREP */ 3809 /* LDV_COMMENT_FUNCTION_CALL Function from field "configure_filter" from driver structure with callbacks "carl9170_ops" */ 3810 carl9170_op_configure_filter( var_group1, var_carl9170_op_configure_filter_17_p1, var_carl9170_op_configure_filter_17_p2, var_carl9170_op_configure_filter_17_p3); 3811 /* LDV_COMMENT_BEGIN_PREP */ 3812 #ifdef CONFIG_CARL9170_WPC 3813 #endif 3814 #define RW 8 3815 #define RB (sizeof(u32) * RW) 3816 #ifndef __CHECKER__ 3817 #endif 3818 #undef RW 3819 #undef RB 3820 #ifdef CONFIG_CARL9170_DEBUGFS 3821 #endif 3822 #ifdef CONFIG_CARL9170_LEDS 3823 #endif 3824 #ifdef CONFIG_CARL9170_WPC 3825 #endif 3826 #ifdef CONFIG_CARL9170_LEDS 3827 #endif 3828 #ifdef CONFIG_CARL9170_DEBUGFS 3829 #endif 3830 #ifdef CONFIG_CARL9170_WPC 3831 #endif 3832 /* LDV_COMMENT_END_PREP */ 3833 3834 3835 3836 3837 } 3838 3839 break; 3840 case 8: { 3841 3842 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3843 3844 3845 /* content: static int carl9170_op_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *param)*/ 3846 /* LDV_COMMENT_BEGIN_PREP */ 3847 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3848 .bitrate = (_bitrate), \ 3849 .flags = (_flags), \ 3850 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3851 } 3852 #undef RATE 3853 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3854 #define carl9170_g_ratetable_size 12 3855 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3856 #define carl9170_a_ratetable_size 8 3857 #define CHAN(_freq, _idx) { \ 3858 .center_freq = (_freq), \ 3859 .hw_value = (_idx), \ 3860 .max_power = 18, \ 3861 } 3862 #undef CHAN 3863 #define CARL9170_HT_CAP \ 3864 { \ 3865 .ht_supported = true, \ 3866 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3867 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3868 IEEE80211_HT_CAP_SGI_40 | \ 3869 IEEE80211_HT_CAP_DSSSCCK40 | \ 3870 IEEE80211_HT_CAP_SM_PS, \ 3871 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3872 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3873 .mcs = { \ 3874 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3875 .rx_highest = cpu_to_le16(300), \ 3876 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3877 }, \ 3878 } 3879 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3880 do { \ 3881 queue.aifs = ai_fs; \ 3882 queue.cw_min = cwmin; \ 3883 queue.cw_max = cwmax; \ 3884 queue.txop = _txop; \ 3885 } while (0) 3886 #ifdef CONFIG_CARL9170_LEDS 3887 #endif 3888 /* LDV_COMMENT_END_PREP */ 3889 /* LDV_COMMENT_FUNCTION_CALL Function from field "conf_tx" from driver structure with callbacks "carl9170_ops" */ 3890 carl9170_op_conf_tx( var_group1, var_carl9170_op_conf_tx_23_p1, var_carl9170_op_conf_tx_23_p2); 3891 /* LDV_COMMENT_BEGIN_PREP */ 3892 #ifdef CONFIG_CARL9170_WPC 3893 #endif 3894 #define RW 8 3895 #define RB (sizeof(u32) * RW) 3896 #ifndef __CHECKER__ 3897 #endif 3898 #undef RW 3899 #undef RB 3900 #ifdef CONFIG_CARL9170_DEBUGFS 3901 #endif 3902 #ifdef CONFIG_CARL9170_LEDS 3903 #endif 3904 #ifdef CONFIG_CARL9170_WPC 3905 #endif 3906 #ifdef CONFIG_CARL9170_LEDS 3907 #endif 3908 #ifdef CONFIG_CARL9170_DEBUGFS 3909 #endif 3910 #ifdef CONFIG_CARL9170_WPC 3911 #endif 3912 /* LDV_COMMENT_END_PREP */ 3913 3914 3915 3916 3917 } 3918 3919 break; 3920 case 9: { 3921 3922 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 3923 3924 3925 /* content: static void carl9170_op_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *bss_conf, u32 changed)*/ 3926 /* LDV_COMMENT_BEGIN_PREP */ 3927 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 3928 .bitrate = (_bitrate), \ 3929 .flags = (_flags), \ 3930 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 3931 } 3932 #undef RATE 3933 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 3934 #define carl9170_g_ratetable_size 12 3935 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 3936 #define carl9170_a_ratetable_size 8 3937 #define CHAN(_freq, _idx) { \ 3938 .center_freq = (_freq), \ 3939 .hw_value = (_idx), \ 3940 .max_power = 18, \ 3941 } 3942 #undef CHAN 3943 #define CARL9170_HT_CAP \ 3944 { \ 3945 .ht_supported = true, \ 3946 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 3947 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 3948 IEEE80211_HT_CAP_SGI_40 | \ 3949 IEEE80211_HT_CAP_DSSSCCK40 | \ 3950 IEEE80211_HT_CAP_SM_PS, \ 3951 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 3952 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 3953 .mcs = { \ 3954 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 3955 .rx_highest = cpu_to_le16(300), \ 3956 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 3957 }, \ 3958 } 3959 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 3960 do { \ 3961 queue.aifs = ai_fs; \ 3962 queue.cw_min = cwmin; \ 3963 queue.cw_max = cwmax; \ 3964 queue.txop = _txop; \ 3965 } while (0) 3966 #ifdef CONFIG_CARL9170_LEDS 3967 #endif 3968 /* LDV_COMMENT_END_PREP */ 3969 /* LDV_COMMENT_FUNCTION_CALL Function from field "bss_info_changed" from driver structure with callbacks "carl9170_ops" */ 3970 carl9170_op_bss_info_changed( var_group1, var_group2, var_carl9170_op_bss_info_changed_18_p2, var_carl9170_op_bss_info_changed_18_p3); 3971 /* LDV_COMMENT_BEGIN_PREP */ 3972 #ifdef CONFIG_CARL9170_WPC 3973 #endif 3974 #define RW 8 3975 #define RB (sizeof(u32) * RW) 3976 #ifndef __CHECKER__ 3977 #endif 3978 #undef RW 3979 #undef RB 3980 #ifdef CONFIG_CARL9170_DEBUGFS 3981 #endif 3982 #ifdef CONFIG_CARL9170_LEDS 3983 #endif 3984 #ifdef CONFIG_CARL9170_WPC 3985 #endif 3986 #ifdef CONFIG_CARL9170_LEDS 3987 #endif 3988 #ifdef CONFIG_CARL9170_DEBUGFS 3989 #endif 3990 #ifdef CONFIG_CARL9170_WPC 3991 #endif 3992 /* LDV_COMMENT_END_PREP */ 3993 3994 3995 3996 3997 } 3998 3999 break; 4000 case 10: { 4001 4002 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4003 4004 4005 /* content: static u64 carl9170_op_get_tsf(struct ieee80211_hw *hw)*/ 4006 /* LDV_COMMENT_BEGIN_PREP */ 4007 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4008 .bitrate = (_bitrate), \ 4009 .flags = (_flags), \ 4010 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4011 } 4012 #undef RATE 4013 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4014 #define carl9170_g_ratetable_size 12 4015 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4016 #define carl9170_a_ratetable_size 8 4017 #define CHAN(_freq, _idx) { \ 4018 .center_freq = (_freq), \ 4019 .hw_value = (_idx), \ 4020 .max_power = 18, \ 4021 } 4022 #undef CHAN 4023 #define CARL9170_HT_CAP \ 4024 { \ 4025 .ht_supported = true, \ 4026 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4027 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4028 IEEE80211_HT_CAP_SGI_40 | \ 4029 IEEE80211_HT_CAP_DSSSCCK40 | \ 4030 IEEE80211_HT_CAP_SM_PS, \ 4031 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4032 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4033 .mcs = { \ 4034 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4035 .rx_highest = cpu_to_le16(300), \ 4036 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4037 }, \ 4038 } 4039 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4040 do { \ 4041 queue.aifs = ai_fs; \ 4042 queue.cw_min = cwmin; \ 4043 queue.cw_max = cwmax; \ 4044 queue.txop = _txop; \ 4045 } while (0) 4046 #ifdef CONFIG_CARL9170_LEDS 4047 #endif 4048 /* LDV_COMMENT_END_PREP */ 4049 /* LDV_COMMENT_FUNCTION_CALL Function from field "get_tsf" from driver structure with callbacks "carl9170_ops" */ 4050 carl9170_op_get_tsf( var_group1); 4051 /* LDV_COMMENT_BEGIN_PREP */ 4052 #ifdef CONFIG_CARL9170_WPC 4053 #endif 4054 #define RW 8 4055 #define RB (sizeof(u32) * RW) 4056 #ifndef __CHECKER__ 4057 #endif 4058 #undef RW 4059 #undef RB 4060 #ifdef CONFIG_CARL9170_DEBUGFS 4061 #endif 4062 #ifdef CONFIG_CARL9170_LEDS 4063 #endif 4064 #ifdef CONFIG_CARL9170_WPC 4065 #endif 4066 #ifdef CONFIG_CARL9170_LEDS 4067 #endif 4068 #ifdef CONFIG_CARL9170_DEBUGFS 4069 #endif 4070 #ifdef CONFIG_CARL9170_WPC 4071 #endif 4072 /* LDV_COMMENT_END_PREP */ 4073 4074 4075 4076 4077 } 4078 4079 break; 4080 case 11: { 4081 4082 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4083 4084 4085 /* content: static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *key)*/ 4086 /* LDV_COMMENT_BEGIN_PREP */ 4087 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4088 .bitrate = (_bitrate), \ 4089 .flags = (_flags), \ 4090 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4091 } 4092 #undef RATE 4093 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4094 #define carl9170_g_ratetable_size 12 4095 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4096 #define carl9170_a_ratetable_size 8 4097 #define CHAN(_freq, _idx) { \ 4098 .center_freq = (_freq), \ 4099 .hw_value = (_idx), \ 4100 .max_power = 18, \ 4101 } 4102 #undef CHAN 4103 #define CARL9170_HT_CAP \ 4104 { \ 4105 .ht_supported = true, \ 4106 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4107 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4108 IEEE80211_HT_CAP_SGI_40 | \ 4109 IEEE80211_HT_CAP_DSSSCCK40 | \ 4110 IEEE80211_HT_CAP_SM_PS, \ 4111 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4112 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4113 .mcs = { \ 4114 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4115 .rx_highest = cpu_to_le16(300), \ 4116 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4117 }, \ 4118 } 4119 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4120 do { \ 4121 queue.aifs = ai_fs; \ 4122 queue.cw_min = cwmin; \ 4123 queue.cw_max = cwmax; \ 4124 queue.txop = _txop; \ 4125 } while (0) 4126 #ifdef CONFIG_CARL9170_LEDS 4127 #endif 4128 /* LDV_COMMENT_END_PREP */ 4129 /* LDV_COMMENT_FUNCTION_CALL Function from field "set_key" from driver structure with callbacks "carl9170_ops" */ 4130 carl9170_op_set_key( var_group1, var_carl9170_op_set_key_20_p1, var_carl9170_op_set_key_20_p2, var_carl9170_op_set_key_20_p3, var_carl9170_op_set_key_20_p4); 4131 /* LDV_COMMENT_BEGIN_PREP */ 4132 #ifdef CONFIG_CARL9170_WPC 4133 #endif 4134 #define RW 8 4135 #define RB (sizeof(u32) * RW) 4136 #ifndef __CHECKER__ 4137 #endif 4138 #undef RW 4139 #undef RB 4140 #ifdef CONFIG_CARL9170_DEBUGFS 4141 #endif 4142 #ifdef CONFIG_CARL9170_LEDS 4143 #endif 4144 #ifdef CONFIG_CARL9170_WPC 4145 #endif 4146 #ifdef CONFIG_CARL9170_LEDS 4147 #endif 4148 #ifdef CONFIG_CARL9170_DEBUGFS 4149 #endif 4150 #ifdef CONFIG_CARL9170_WPC 4151 #endif 4152 /* LDV_COMMENT_END_PREP */ 4153 4154 4155 4156 4157 } 4158 4159 break; 4160 case 12: { 4161 4162 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4163 4164 4165 /* content: static int carl9170_op_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta)*/ 4166 /* LDV_COMMENT_BEGIN_PREP */ 4167 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4168 .bitrate = (_bitrate), \ 4169 .flags = (_flags), \ 4170 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4171 } 4172 #undef RATE 4173 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4174 #define carl9170_g_ratetable_size 12 4175 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4176 #define carl9170_a_ratetable_size 8 4177 #define CHAN(_freq, _idx) { \ 4178 .center_freq = (_freq), \ 4179 .hw_value = (_idx), \ 4180 .max_power = 18, \ 4181 } 4182 #undef CHAN 4183 #define CARL9170_HT_CAP \ 4184 { \ 4185 .ht_supported = true, \ 4186 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4187 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4188 IEEE80211_HT_CAP_SGI_40 | \ 4189 IEEE80211_HT_CAP_DSSSCCK40 | \ 4190 IEEE80211_HT_CAP_SM_PS, \ 4191 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4192 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4193 .mcs = { \ 4194 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4195 .rx_highest = cpu_to_le16(300), \ 4196 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4197 }, \ 4198 } 4199 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4200 do { \ 4201 queue.aifs = ai_fs; \ 4202 queue.cw_min = cwmin; \ 4203 queue.cw_max = cwmax; \ 4204 queue.txop = _txop; \ 4205 } while (0) 4206 #ifdef CONFIG_CARL9170_LEDS 4207 #endif 4208 /* LDV_COMMENT_END_PREP */ 4209 /* LDV_COMMENT_FUNCTION_CALL Function from field "sta_add" from driver structure with callbacks "carl9170_ops" */ 4210 carl9170_op_sta_add( var_group1, var_group2, var_carl9170_op_sta_add_21_p2); 4211 /* LDV_COMMENT_BEGIN_PREP */ 4212 #ifdef CONFIG_CARL9170_WPC 4213 #endif 4214 #define RW 8 4215 #define RB (sizeof(u32) * RW) 4216 #ifndef __CHECKER__ 4217 #endif 4218 #undef RW 4219 #undef RB 4220 #ifdef CONFIG_CARL9170_DEBUGFS 4221 #endif 4222 #ifdef CONFIG_CARL9170_LEDS 4223 #endif 4224 #ifdef CONFIG_CARL9170_WPC 4225 #endif 4226 #ifdef CONFIG_CARL9170_LEDS 4227 #endif 4228 #ifdef CONFIG_CARL9170_DEBUGFS 4229 #endif 4230 #ifdef CONFIG_CARL9170_WPC 4231 #endif 4232 /* LDV_COMMENT_END_PREP */ 4233 4234 4235 4236 4237 } 4238 4239 break; 4240 case 13: { 4241 4242 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4243 4244 4245 /* content: static int carl9170_op_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta)*/ 4246 /* LDV_COMMENT_BEGIN_PREP */ 4247 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4248 .bitrate = (_bitrate), \ 4249 .flags = (_flags), \ 4250 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4251 } 4252 #undef RATE 4253 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4254 #define carl9170_g_ratetable_size 12 4255 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4256 #define carl9170_a_ratetable_size 8 4257 #define CHAN(_freq, _idx) { \ 4258 .center_freq = (_freq), \ 4259 .hw_value = (_idx), \ 4260 .max_power = 18, \ 4261 } 4262 #undef CHAN 4263 #define CARL9170_HT_CAP \ 4264 { \ 4265 .ht_supported = true, \ 4266 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4267 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4268 IEEE80211_HT_CAP_SGI_40 | \ 4269 IEEE80211_HT_CAP_DSSSCCK40 | \ 4270 IEEE80211_HT_CAP_SM_PS, \ 4271 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4272 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4273 .mcs = { \ 4274 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4275 .rx_highest = cpu_to_le16(300), \ 4276 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4277 }, \ 4278 } 4279 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4280 do { \ 4281 queue.aifs = ai_fs; \ 4282 queue.cw_min = cwmin; \ 4283 queue.cw_max = cwmax; \ 4284 queue.txop = _txop; \ 4285 } while (0) 4286 #ifdef CONFIG_CARL9170_LEDS 4287 #endif 4288 /* LDV_COMMENT_END_PREP */ 4289 /* LDV_COMMENT_FUNCTION_CALL Function from field "sta_remove" from driver structure with callbacks "carl9170_ops" */ 4290 carl9170_op_sta_remove( var_group1, var_group2, var_carl9170_op_sta_remove_22_p2); 4291 /* LDV_COMMENT_BEGIN_PREP */ 4292 #ifdef CONFIG_CARL9170_WPC 4293 #endif 4294 #define RW 8 4295 #define RB (sizeof(u32) * RW) 4296 #ifndef __CHECKER__ 4297 #endif 4298 #undef RW 4299 #undef RB 4300 #ifdef CONFIG_CARL9170_DEBUGFS 4301 #endif 4302 #ifdef CONFIG_CARL9170_LEDS 4303 #endif 4304 #ifdef CONFIG_CARL9170_WPC 4305 #endif 4306 #ifdef CONFIG_CARL9170_LEDS 4307 #endif 4308 #ifdef CONFIG_CARL9170_DEBUGFS 4309 #endif 4310 #ifdef CONFIG_CARL9170_WPC 4311 #endif 4312 /* LDV_COMMENT_END_PREP */ 4313 4314 4315 4316 4317 } 4318 4319 break; 4320 case 14: { 4321 4322 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4323 4324 4325 /* content: static void carl9170_op_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta)*/ 4326 /* LDV_COMMENT_BEGIN_PREP */ 4327 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4328 .bitrate = (_bitrate), \ 4329 .flags = (_flags), \ 4330 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4331 } 4332 #undef RATE 4333 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4334 #define carl9170_g_ratetable_size 12 4335 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4336 #define carl9170_a_ratetable_size 8 4337 #define CHAN(_freq, _idx) { \ 4338 .center_freq = (_freq), \ 4339 .hw_value = (_idx), \ 4340 .max_power = 18, \ 4341 } 4342 #undef CHAN 4343 #define CARL9170_HT_CAP \ 4344 { \ 4345 .ht_supported = true, \ 4346 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4347 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4348 IEEE80211_HT_CAP_SGI_40 | \ 4349 IEEE80211_HT_CAP_DSSSCCK40 | \ 4350 IEEE80211_HT_CAP_SM_PS, \ 4351 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4352 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4353 .mcs = { \ 4354 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4355 .rx_highest = cpu_to_le16(300), \ 4356 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4357 }, \ 4358 } 4359 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4360 do { \ 4361 queue.aifs = ai_fs; \ 4362 queue.cw_min = cwmin; \ 4363 queue.cw_max = cwmax; \ 4364 queue.txop = _txop; \ 4365 } while (0) 4366 #ifdef CONFIG_CARL9170_LEDS 4367 #endif 4368 #ifdef CONFIG_CARL9170_WPC 4369 #endif 4370 /* LDV_COMMENT_END_PREP */ 4371 /* LDV_COMMENT_FUNCTION_CALL Function from field "sta_notify" from driver structure with callbacks "carl9170_ops" */ 4372 carl9170_op_sta_notify( var_group1, var_group2, var_carl9170_op_sta_notify_30_p2, var_carl9170_op_sta_notify_30_p3); 4373 /* LDV_COMMENT_BEGIN_PREP */ 4374 #define RW 8 4375 #define RB (sizeof(u32) * RW) 4376 #ifndef __CHECKER__ 4377 #endif 4378 #undef RW 4379 #undef RB 4380 #ifdef CONFIG_CARL9170_DEBUGFS 4381 #endif 4382 #ifdef CONFIG_CARL9170_LEDS 4383 #endif 4384 #ifdef CONFIG_CARL9170_WPC 4385 #endif 4386 #ifdef CONFIG_CARL9170_LEDS 4387 #endif 4388 #ifdef CONFIG_CARL9170_DEBUGFS 4389 #endif 4390 #ifdef CONFIG_CARL9170_WPC 4391 #endif 4392 /* LDV_COMMENT_END_PREP */ 4393 4394 4395 4396 4397 } 4398 4399 break; 4400 case 15: { 4401 4402 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4403 4404 4405 /* content: static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)*/ 4406 /* LDV_COMMENT_BEGIN_PREP */ 4407 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4408 .bitrate = (_bitrate), \ 4409 .flags = (_flags), \ 4410 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4411 } 4412 #undef RATE 4413 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4414 #define carl9170_g_ratetable_size 12 4415 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4416 #define carl9170_a_ratetable_size 8 4417 #define CHAN(_freq, _idx) { \ 4418 .center_freq = (_freq), \ 4419 .hw_value = (_idx), \ 4420 .max_power = 18, \ 4421 } 4422 #undef CHAN 4423 #define CARL9170_HT_CAP \ 4424 { \ 4425 .ht_supported = true, \ 4426 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4427 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4428 IEEE80211_HT_CAP_SGI_40 | \ 4429 IEEE80211_HT_CAP_DSSSCCK40 | \ 4430 IEEE80211_HT_CAP_SM_PS, \ 4431 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4432 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4433 .mcs = { \ 4434 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4435 .rx_highest = cpu_to_le16(300), \ 4436 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4437 }, \ 4438 } 4439 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4440 do { \ 4441 queue.aifs = ai_fs; \ 4442 queue.cw_min = cwmin; \ 4443 queue.cw_max = cwmax; \ 4444 queue.txop = _txop; \ 4445 } while (0) 4446 #ifdef CONFIG_CARL9170_LEDS 4447 #endif 4448 #ifdef CONFIG_CARL9170_WPC 4449 #endif 4450 /* LDV_COMMENT_END_PREP */ 4451 /* LDV_COMMENT_FUNCTION_CALL Function from field "get_survey" from driver structure with callbacks "carl9170_ops" */ 4452 carl9170_op_get_survey( var_group1, var_carl9170_op_get_survey_27_p1, var_carl9170_op_get_survey_27_p2); 4453 /* LDV_COMMENT_BEGIN_PREP */ 4454 #define RW 8 4455 #define RB (sizeof(u32) * RW) 4456 #ifndef __CHECKER__ 4457 #endif 4458 #undef RW 4459 #undef RB 4460 #ifdef CONFIG_CARL9170_DEBUGFS 4461 #endif 4462 #ifdef CONFIG_CARL9170_LEDS 4463 #endif 4464 #ifdef CONFIG_CARL9170_WPC 4465 #endif 4466 #ifdef CONFIG_CARL9170_LEDS 4467 #endif 4468 #ifdef CONFIG_CARL9170_DEBUGFS 4469 #endif 4470 #ifdef CONFIG_CARL9170_WPC 4471 #endif 4472 /* LDV_COMMENT_END_PREP */ 4473 4474 4475 4476 4477 } 4478 4479 break; 4480 case 16: { 4481 4482 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4483 4484 4485 /* content: static int carl9170_op_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats)*/ 4486 /* LDV_COMMENT_BEGIN_PREP */ 4487 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4488 .bitrate = (_bitrate), \ 4489 .flags = (_flags), \ 4490 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4491 } 4492 #undef RATE 4493 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4494 #define carl9170_g_ratetable_size 12 4495 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4496 #define carl9170_a_ratetable_size 8 4497 #define CHAN(_freq, _idx) { \ 4498 .center_freq = (_freq), \ 4499 .hw_value = (_idx), \ 4500 .max_power = 18, \ 4501 } 4502 #undef CHAN 4503 #define CARL9170_HT_CAP \ 4504 { \ 4505 .ht_supported = true, \ 4506 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4507 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4508 IEEE80211_HT_CAP_SGI_40 | \ 4509 IEEE80211_HT_CAP_DSSSCCK40 | \ 4510 IEEE80211_HT_CAP_SM_PS, \ 4511 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4512 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4513 .mcs = { \ 4514 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4515 .rx_highest = cpu_to_le16(300), \ 4516 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4517 }, \ 4518 } 4519 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4520 do { \ 4521 queue.aifs = ai_fs; \ 4522 queue.cw_min = cwmin; \ 4523 queue.cw_max = cwmax; \ 4524 queue.txop = _txop; \ 4525 } while (0) 4526 #ifdef CONFIG_CARL9170_LEDS 4527 #endif 4528 #ifdef CONFIG_CARL9170_WPC 4529 #endif 4530 /* LDV_COMMENT_END_PREP */ 4531 /* LDV_COMMENT_FUNCTION_CALL Function from field "get_stats" from driver structure with callbacks "carl9170_ops" */ 4532 carl9170_op_get_stats( var_group1, var_group4); 4533 /* LDV_COMMENT_BEGIN_PREP */ 4534 #define RW 8 4535 #define RB (sizeof(u32) * RW) 4536 #ifndef __CHECKER__ 4537 #endif 4538 #undef RW 4539 #undef RB 4540 #ifdef CONFIG_CARL9170_DEBUGFS 4541 #endif 4542 #ifdef CONFIG_CARL9170_LEDS 4543 #endif 4544 #ifdef CONFIG_CARL9170_WPC 4545 #endif 4546 #ifdef CONFIG_CARL9170_LEDS 4547 #endif 4548 #ifdef CONFIG_CARL9170_DEBUGFS 4549 #endif 4550 #ifdef CONFIG_CARL9170_WPC 4551 #endif 4552 /* LDV_COMMENT_END_PREP */ 4553 4554 4555 4556 4557 } 4558 4559 break; 4560 case 17: { 4561 4562 /** STRUCT: struct type: ieee80211_ops, struct name: carl9170_ops **/ 4563 4564 4565 /* content: static int carl9170_op_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn)*/ 4566 /* LDV_COMMENT_BEGIN_PREP */ 4567 #define RATE(_bitrate, _hw_rate, _txpidx, _flags) { \ 4568 .bitrate = (_bitrate), \ 4569 .flags = (_flags), \ 4570 .hw_value = (_hw_rate) | (_txpidx) << 4, \ 4571 } 4572 #undef RATE 4573 #define carl9170_g_ratetable (__carl9170_ratetable + 0) 4574 #define carl9170_g_ratetable_size 12 4575 #define carl9170_a_ratetable (__carl9170_ratetable + 4) 4576 #define carl9170_a_ratetable_size 8 4577 #define CHAN(_freq, _idx) { \ 4578 .center_freq = (_freq), \ 4579 .hw_value = (_idx), \ 4580 .max_power = 18, \ 4581 } 4582 #undef CHAN 4583 #define CARL9170_HT_CAP \ 4584 { \ 4585 .ht_supported = true, \ 4586 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \ 4587 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \ 4588 IEEE80211_HT_CAP_SGI_40 | \ 4589 IEEE80211_HT_CAP_DSSSCCK40 | \ 4590 IEEE80211_HT_CAP_SM_PS, \ 4591 .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, \ 4592 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \ 4593 .mcs = { \ 4594 .rx_mask = { 0xff, 0xff, 0, 0, 0x1, 0, 0, 0, 0, 0, }, \ 4595 .rx_highest = cpu_to_le16(300), \ 4596 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4597 }, \ 4598 } 4599 #define CARL9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 4600 do { \ 4601 queue.aifs = ai_fs; \ 4602 queue.cw_min = cwmin; \ 4603 queue.cw_max = cwmax; \ 4604 queue.txop = _txop; \ 4605 } while (0) 4606 #ifdef CONFIG_CARL9170_LEDS 4607 #endif 4608 /* LDV_COMMENT_END_PREP */ 4609 /* LDV_COMMENT_FUNCTION_CALL Function from field "ampdu_action" from driver structure with callbacks "carl9170_ops" */ 4610 carl9170_op_ampdu_action( var_group1, var_group2, var_carl9170_op_ampdu_action_25_p2, var_carl9170_op_ampdu_action_25_p3, var_carl9170_op_ampdu_action_25_p4, var_carl9170_op_ampdu_action_25_p5); 4611 /* LDV_COMMENT_BEGIN_PREP */ 4612 #ifdef CONFIG_CARL9170_WPC 4613 #endif 4614 #define RW 8 4615 #define RB (sizeof(u32) * RW) 4616 #ifndef __CHECKER__ 4617 #endif 4618 #undef RW 4619 #undef RB 4620 #ifdef CONFIG_CARL9170_DEBUGFS 4621 #endif 4622 #ifdef CONFIG_CARL9170_LEDS 4623 #endif 4624 #ifdef CONFIG_CARL9170_WPC 4625 #endif 4626 #ifdef CONFIG_CARL9170_LEDS 4627 #endif 4628 #ifdef CONFIG_CARL9170_DEBUGFS 4629 #endif 4630 #ifdef CONFIG_CARL9170_WPC 4631 #endif 4632 /* LDV_COMMENT_END_PREP */ 4633 4634 4635 4636 4637 } 4638 4639 break; 4640 default: break; 4641 4642 } 4643 4644 } 4645 4646 ldv_module_exit: 4647 4648 /* LDV_COMMENT_FUNCTION_CALL Checks that all resources and locks are correctly released before the driver will be unloaded. */ 4649 ldv_final: ldv_check_final_state(); 4650 4651 /* LDV_COMMENT_END_FUNCTION_CALL_SECTION */ 4652 return; 4653 4654 } 4655 #endif 4656 4657 /* LDV_COMMENT_END_MAIN */ 4658 /* LDV_COMMENT_BEGIN_MODEL */ 4659 4660 /* 4661 * CONFIG_DEBUG_LOCK_ALLOC must be turned off to apply the given model. 4662 * To be independ on the value of this flag there is the corresponding 4663 * aspect model. 4664 */ 4665 4666 /* the function works only without aspectator */ 4667 long __builtin_expect(long val, long res) { 4668 return val; 4669 } 4670 4671 #include "engine-blast.h" 4672 4673 #include <linux/kernel.h> 4674 #include <linux/mutex.h> 4675 4676 /* Need this because rerouter is buggy!.. */ 4677 extern int ldv_mutex_TEMPLATE; 4678 /* Now the actual variable goes... */ 4679 int ldv_mutex_TEMPLATE = 1; 4680 4681 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_lock_interruptible') Check that the mutex was unlocked and nondeterministically lock it. Return the corresponding error code on fails*/ 4682 int mutex_lock_interruptible_TEMPLATE(struct mutex *lock) 4683 { 4684 int nondetermined; 4685 4686 /* LDV_COMMENT_ASSERT Mutex must be unlocked*/ 4687 ldv_assert(ldv_mutex_TEMPLATE == 1); 4688 4689 /* LDV_COMMENT_OTHER Construct the nondetermined result*/ 4690 nondetermined = ldv_undef_int(); 4691 4692 /* LDV_COMMENT_ASSERT Nondeterministically lock the mutex*/ 4693 if (nondetermined) 4694 { 4695 /* LDV_COMMENT_CHANGE_STATE Lock the mutex*/ 4696 ldv_mutex_TEMPLATE = 2; 4697 /* LDV_COMMENT_RETURN Finish with success*/ 4698 return 0; 4699 } 4700 else 4701 { 4702 /* LDV_COMMENT_RETURN Finish with the fail. The mutex is keeped unlocked*/ 4703 return -EINTR; 4704 } 4705 } 4706 4707 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='atomic_dec_and_mutex_lock') Lock if atomic decrement result is zero */ 4708 int atomic_dec_and_mutex_lock_TEMPLATE(atomic_t *cnt, struct mutex *lock) 4709 { 4710 int atomic_value_after_dec; 4711 4712 /* LDV_COMMENT_ASSERT Mutex must be unlocked (since we may lock it in this function) */ 4713 ldv_assert(ldv_mutex_TEMPLATE == 1); 4714 4715 /* LDV_COMMENT_OTHER Assign the result of atomic decrement */ 4716 atomic_value_after_dec = ldv_undef_int(); 4717 4718 /* LDV_COMMENT_ASSERT Check if atomic decrement returns zero */ 4719 if (atomic_value_after_dec == 0) 4720 { 4721 /* LDV_COMMENT_CHANGE_STATE Lock the mutex, as atomic has decremented to zero*/ 4722 ldv_mutex_TEMPLATE = 2; 4723 /* LDV_COMMENT_RETURN Return 1 with a locked mutex */ 4724 return 1; 4725 } 4726 4727 /* LDV_COMMENT_RETURN Atomic decrement is still not zero, return 0 without locking the mutex */ 4728 return 0; 4729 } 4730 4731 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_lock_killable') Check that the mutex wasn unlocked and nondeterministically lock it. Return the corresponding error code on fails*/ 4732 int __must_check mutex_lock_killable_TEMPLATE(struct mutex *lock) 4733 { 4734 int nondetermined; 4735 4736 /* LDV_COMMENT_ASSERT Mutex must be unlocked*/ 4737 ldv_assert(ldv_mutex_TEMPLATE == 1); 4738 4739 /* LDV_COMMENT_OTHER Construct the nondetermined result*/ 4740 nondetermined = ldv_undef_int(); 4741 4742 /* LDV_COMMENT_ASSERT Nondeterministically lock the mutex*/ 4743 if (nondetermined) 4744 { 4745 /* LDV_COMMENT_CHANGE_STATE Lock the mutex*/ 4746 ldv_mutex_TEMPLATE = 2; 4747 /* LDV_COMMENT_RETURN Finish with success*/ 4748 return 0; 4749 } 4750 else 4751 { 4752 /* LDV_COMMENT_RETURN Finish with the fail. The mutex is keeped unlocked*/ 4753 return -EINTR; 4754 } 4755 } 4756 4757 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_is_locked') Checks whether the mutex is locked*/ 4758 int mutex_is_locked_TEMPLATE(struct mutex *lock) 4759 { 4760 int nondetermined; 4761 4762 if(ldv_mutex_TEMPLATE == 1) { 4763 /* LDV_COMMENT_OTHER Construct the nondetermined result*/ 4764 nondetermined = ldv_undef_int(); 4765 if(nondetermined) { 4766 /* LDV_COMMENT_RETURN the mutex is unlocked*/ 4767 return 0; 4768 } else { 4769 /* LDV_COMMENT_RETURN the mutex is locked*/ 4770 return 1; 4771 } 4772 } else { 4773 /* LDV_COMMENT_RETURN the mutex is locked*/ 4774 return 1; 4775 } 4776 } 4777 4778 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_lock(?!_interruptible|_killable)') Check that the mutex was not locked and lock it*/ 4779 void mutex_lock_TEMPLATE(struct mutex *lock) 4780 { 4781 /* LDV_COMMENT_ASSERT Mutex must be unlocked*/ 4782 ldv_assert(ldv_mutex_TEMPLATE == 1); 4783 /* LDV_COMMENT_CHANGE_STATE Lock the mutex*/ 4784 ldv_mutex_TEMPLATE = 2; 4785 } 4786 4787 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_trylock') Check that the mutex was not locked and nondeterministically lock it. Return 0 on fails*/ 4788 int mutex_trylock_TEMPLATE(struct mutex *lock) 4789 { 4790 int is_mutex_held_by_another_thread; 4791 4792 /* LDV_COMMENT_ASSERT Mutex must be unlocked*/ 4793 ldv_assert(ldv_mutex_TEMPLATE == 1); 4794 4795 /* LDV_COMMENT_OTHER Construct the nondetermined result*/ 4796 is_mutex_held_by_another_thread = ldv_undef_int(); 4797 4798 /* LDV_COMMENT_ASSERT Nondeterministically lock the mutex*/ 4799 if (is_mutex_held_by_another_thread) 4800 { 4801 /* LDV_COMMENT_RETURN Finish with fail*/ 4802 return 0; 4803 } 4804 else 4805 { 4806 /* LDV_COMMENT_CHANGE_STATE Lock the mutex*/ 4807 ldv_mutex_TEMPLATE = 2; 4808 /* LDV_COMMENT_RETURN Finish with success*/ 4809 return 1; 4810 } 4811 } 4812 4813 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='mutex_unlock') Check that the mutex was locked and unlock it*/ 4814 void mutex_unlock_TEMPLATE(struct mutex *lock) 4815 { 4816 /* LDV_COMMENT_ASSERT Mutex must be locked*/ 4817 ldv_assert(ldv_mutex_TEMPLATE == 2); 4818 /* LDV_COMMENT_CHANGE_STATE Unlock the mutex*/ 4819 ldv_mutex_TEMPLATE = 1; 4820 } 4821 4822 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='check_final_state') Check that the mutex is unlocked at the end*/ 4823 void ldv_check_final_state_TEMPLATE(void) 4824 { 4825 /* LDV_COMMENT_ASSERT The mutex must be unlocked at the end*/ 4826 ldv_assert(ldv_mutex_TEMPLATE == 1); 4827 } 4828 4829 /* LDV_COMMENT_MODEL_FUNCTION_DEFINITION(name='ldv_initialize') Initialize mutex variables*/ 4830 void ldv_initialize_TEMPLATE(void) 4831 { 4832 /* LDV_COMMENT_ASSERT Initialize mutex with initial model value*/ 4833 ldv_mutex_TEMPLATE = 1; 4834 } 4835 4836 /* LDV_COMMENT_END_MODEL */

1 /* 2 * Shared Atheros AR9170 Header 3 * 4 * RX/TX meta descriptor format 5 * 6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 7 * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; see the file COPYING. If not, see 20 * http://www.gnu.org/licenses/. 21 * 22 * This file incorporates work covered by the following copyright and 23 * permission notice: 24 * Copyright (c) 2007-2008 Atheros Communications, Inc. 25 * 26 * Permission to use, copy, modify, and/or distribute this software for any 27 * purpose with or without fee is hereby granted, provided that the above 28 * copyright notice and this permission notice appear in all copies. 29 * 30 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 31 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 32 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 33 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 34 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 35 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 37 */ 38 39 #ifndef __CARL9170_SHARED_WLAN_H 40 #define __CARL9170_SHARED_WLAN_H 41 42 #include "fwcmd.h" 43 44 #define AR9170_RX_PHY_RATE_CCK_1M 0x0a 45 #define AR9170_RX_PHY_RATE_CCK_2M 0x14 46 #define AR9170_RX_PHY_RATE_CCK_5M 0x37 47 #define AR9170_RX_PHY_RATE_CCK_11M 0x6e 48 49 #define AR9170_ENC_ALG_NONE 0x0 50 #define AR9170_ENC_ALG_WEP64 0x1 51 #define AR9170_ENC_ALG_TKIP 0x2 52 #define AR9170_ENC_ALG_AESCCMP 0x4 53 #define AR9170_ENC_ALG_WEP128 0x5 54 #define AR9170_ENC_ALG_WEP256 0x6 55 #define AR9170_ENC_ALG_CENC 0x7 56 57 #define AR9170_RX_ENC_SOFTWARE 0x8 58 59 #define AR9170_RX_STATUS_MODULATION 0x03 60 #define AR9170_RX_STATUS_MODULATION_S 0 61 #define AR9170_RX_STATUS_MODULATION_CCK 0x00 62 #define AR9170_RX_STATUS_MODULATION_OFDM 0x01 63 #define AR9170_RX_STATUS_MODULATION_HT 0x02 64 #define AR9170_RX_STATUS_MODULATION_DUPOFDM 0x03 65 66 /* depends on modulation */ 67 #define AR9170_RX_STATUS_SHORT_PREAMBLE 0x08 68 #define AR9170_RX_STATUS_GREENFIELD 0x08 69 70 #define AR9170_RX_STATUS_MPDU 0x30 71 #define AR9170_RX_STATUS_MPDU_S 4 72 #define AR9170_RX_STATUS_MPDU_SINGLE 0x00 73 #define AR9170_RX_STATUS_MPDU_FIRST 0x20 74 #define AR9170_RX_STATUS_MPDU_MIDDLE 0x30 75 #define AR9170_RX_STATUS_MPDU_LAST 0x10 76 77 #define AR9170_RX_STATUS_CONT_AGGR 0x40 78 #define AR9170_RX_STATUS_TOTAL_ERROR 0x80 79 80 #define AR9170_RX_ERROR_RXTO 0x01 81 #define AR9170_RX_ERROR_OVERRUN 0x02 82 #define AR9170_RX_ERROR_DECRYPT 0x04 83 #define AR9170_RX_ERROR_FCS 0x08 84 #define AR9170_RX_ERROR_WRONG_RA 0x10 85 #define AR9170_RX_ERROR_PLCP 0x20 86 #define AR9170_RX_ERROR_MMIC 0x40 87 88 /* these are either-or */ 89 #define AR9170_TX_MAC_PROT_RTS 0x0001 90 #define AR9170_TX_MAC_PROT_CTS 0x0002 91 #define AR9170_TX_MAC_PROT 0x0003 92 93 #define AR9170_TX_MAC_NO_ACK 0x0004 94 /* if unset, MAC will only do SIFS space before frame */ 95 #define AR9170_TX_MAC_BACKOFF 0x0008 96 #define AR9170_TX_MAC_BURST 0x0010 97 #define AR9170_TX_MAC_AGGR 0x0020 98 99 /* encryption is a two-bit field */ 100 #define AR9170_TX_MAC_ENCR_NONE 0x0000 101 #define AR9170_TX_MAC_ENCR_RC4 0x0040 102 #define AR9170_TX_MAC_ENCR_CENC 0x0080 103 #define AR9170_TX_MAC_ENCR_AES 0x00c0 104 105 #define AR9170_TX_MAC_MMIC 0x0100 106 #define AR9170_TX_MAC_HW_DURATION 0x0200 107 #define AR9170_TX_MAC_QOS_S 10 108 #define AR9170_TX_MAC_QOS 0x0c00 109 #define AR9170_TX_MAC_DISABLE_TXOP 0x1000 110 #define AR9170_TX_MAC_TXOP_RIFS 0x2000 111 #define AR9170_TX_MAC_IMM_BA 0x4000 112 113 /* either-or */ 114 #define AR9170_TX_PHY_MOD_CCK 0x00000000 115 #define AR9170_TX_PHY_MOD_OFDM 0x00000001 116 #define AR9170_TX_PHY_MOD_HT 0x00000002 117 118 /* depends on modulation */ 119 #define AR9170_TX_PHY_SHORT_PREAMBLE 0x00000004 120 #define AR9170_TX_PHY_GREENFIELD 0x00000004 121 122 #define AR9170_TX_PHY_BW_S 3 123 #define AR9170_TX_PHY_BW (3 << AR9170_TX_PHY_BW_SHIFT) 124 #define AR9170_TX_PHY_BW_20MHZ 0 125 #define AR9170_TX_PHY_BW_40MHZ 2 126 #define AR9170_TX_PHY_BW_40MHZ_DUP 3 127 128 #define AR9170_TX_PHY_TX_HEAVY_CLIP_S 6 129 #define AR9170_TX_PHY_TX_HEAVY_CLIP (7 << \ 130 AR9170_TX_PHY_TX_HEAVY_CLIP_S) 131 132 #define AR9170_TX_PHY_TX_PWR_S 9 133 #define AR9170_TX_PHY_TX_PWR (0x3f << \ 134 AR9170_TX_PHY_TX_PWR_S) 135 136 #define AR9170_TX_PHY_TXCHAIN_S 15 137 #define AR9170_TX_PHY_TXCHAIN (7 << \ 138 AR9170_TX_PHY_TXCHAIN_S) 139 #define AR9170_TX_PHY_TXCHAIN_1 1 140 /* use for cck, ofdm 6/9/12/18/24 and HT if capable */ 141 #define AR9170_TX_PHY_TXCHAIN_2 5 142 143 #define AR9170_TX_PHY_MCS_S 18 144 #define AR9170_TX_PHY_MCS (0x7f << \ 145 AR9170_TX_PHY_MCS_S) 146 147 #define AR9170_TX_PHY_RATE_CCK_1M 0x0 148 #define AR9170_TX_PHY_RATE_CCK_2M 0x1 149 #define AR9170_TX_PHY_RATE_CCK_5M 0x2 150 #define AR9170_TX_PHY_RATE_CCK_11M 0x3 151 152 /* same as AR9170_RX_PHY_RATE */ 153 #define AR9170_TXRX_PHY_RATE_OFDM_6M 0xb 154 #define AR9170_TXRX_PHY_RATE_OFDM_9M 0xf 155 #define AR9170_TXRX_PHY_RATE_OFDM_12M 0xa 156 #define AR9170_TXRX_PHY_RATE_OFDM_18M 0xe 157 #define AR9170_TXRX_PHY_RATE_OFDM_24M 0x9 158 #define AR9170_TXRX_PHY_RATE_OFDM_36M 0xd 159 #define AR9170_TXRX_PHY_RATE_OFDM_48M 0x8 160 #define AR9170_TXRX_PHY_RATE_OFDM_54M 0xc 161 162 #define AR9170_TXRX_PHY_RATE_HT_MCS0 0x0 163 #define AR9170_TXRX_PHY_RATE_HT_MCS1 0x1 164 #define AR9170_TXRX_PHY_RATE_HT_MCS2 0x2 165 #define AR9170_TXRX_PHY_RATE_HT_MCS3 0x3 166 #define AR9170_TXRX_PHY_RATE_HT_MCS4 0x4 167 #define AR9170_TXRX_PHY_RATE_HT_MCS5 0x5 168 #define AR9170_TXRX_PHY_RATE_HT_MCS6 0x6 169 #define AR9170_TXRX_PHY_RATE_HT_MCS7 0x7 170 #define AR9170_TXRX_PHY_RATE_HT_MCS8 0x8 171 #define AR9170_TXRX_PHY_RATE_HT_MCS9 0x9 172 #define AR9170_TXRX_PHY_RATE_HT_MCS10 0xa 173 #define AR9170_TXRX_PHY_RATE_HT_MCS11 0xb 174 #define AR9170_TXRX_PHY_RATE_HT_MCS12 0xc 175 #define AR9170_TXRX_PHY_RATE_HT_MCS13 0xd 176 #define AR9170_TXRX_PHY_RATE_HT_MCS14 0xe 177 #define AR9170_TXRX_PHY_RATE_HT_MCS15 0xf 178 179 #define AR9170_TX_PHY_SHORT_GI 0x80000000 180 181 #ifdef __CARL9170FW__ 182 struct ar9170_tx_hw_mac_control { 183 union { 184 struct { 185 /* 186 * Beware of compiler bugs in all gcc pre 4.4! 187 */ 188 189 u8 erp_prot:2; 190 u8 no_ack:1; 191 u8 backoff:1; 192 u8 burst:1; 193 u8 ampdu:1; 194 195 u8 enc_mode:2; 196 197 u8 hw_mmic:1; 198 u8 hw_duration:1; 199 200 u8 qos_queue:2; 201 202 u8 disable_txop:1; 203 u8 txop_rifs:1; 204 205 u8 ba_end:1; 206 u8 probe:1; 207 } __packed; 208 209 __le16 set; 210 } __packed; 211 } __packed; 212 213 struct ar9170_tx_hw_phy_control { 214 union { 215 struct { 216 /* 217 * Beware of compiler bugs in all gcc pre 4.4! 218 */ 219 220 u8 modulation:2; 221 u8 preamble:1; 222 u8 bandwidth:2; 223 u8:1; 224 u8 heavy_clip:3; 225 u8 tx_power:6; 226 u8 chains:3; 227 u8 mcs:7; 228 u8:6; 229 u8 short_gi:1; 230 } __packed; 231 232 __le32 set; 233 } __packed; 234 } __packed; 235 236 struct ar9170_tx_rate_info { 237 u8 tries:3; 238 u8 erp_prot:2; 239 u8 ampdu:1; 240 u8 free:2; /* free for use (e.g.:RIFS/TXOP/AMPDU) */ 241 } __packed; 242 243 struct carl9170_tx_superdesc { 244 __le16 len; 245 u8 rix; 246 u8 cnt; 247 u8 cookie; 248 u8 ampdu_density:3; 249 u8 ampdu_factor:2; 250 u8 ampdu_commit_density:1; 251 u8 ampdu_commit_factor:1; 252 u8 ampdu_unused_bit:1; 253 u8 queue:2; 254 u8 reserved:1; 255 u8 vif_id:3; 256 u8 fill_in_tsf:1; 257 u8 cab:1; 258 u8 padding2; 259 struct ar9170_tx_rate_info ri[CARL9170_TX_MAX_RATES]; 260 struct ar9170_tx_hw_phy_control rr[CARL9170_TX_MAX_RETRY_RATES]; 261 } __packed; 262 263 struct ar9170_tx_hwdesc { 264 __le16 length; 265 struct ar9170_tx_hw_mac_control mac; 266 struct ar9170_tx_hw_phy_control phy; 267 } __packed; 268 269 struct ar9170_tx_frame { 270 struct ar9170_tx_hwdesc hdr; 271 272 union { 273 struct ieee80211_hdr i3e; 274 u8 payload[0]; 275 } data; 276 } __packed; 277 278 struct carl9170_tx_superframe { 279 struct carl9170_tx_superdesc s; 280 struct ar9170_tx_frame f; 281 } __packed; 282 283 #endif /* __CARL9170FW__ */ 284 285 struct _ar9170_tx_hwdesc { 286 __le16 length; 287 __le16 mac_control; 288 __le32 phy_control; 289 } __packed; 290 291 #define CARL9170_TX_SUPER_AMPDU_DENSITY_S 0 292 #define CARL9170_TX_SUPER_AMPDU_DENSITY 0x7 293 #define CARL9170_TX_SUPER_AMPDU_FACTOR 0x18 294 #define CARL9170_TX_SUPER_AMPDU_FACTOR_S 3 295 #define CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY 0x20 296 #define CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY_S 5 297 #define CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR 0x40 298 #define CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR_S 6 299 300 #define CARL9170_TX_SUPER_MISC_QUEUE 0x3 301 #define CARL9170_TX_SUPER_MISC_QUEUE_S 0 302 #define CARL9170_TX_SUPER_MISC_VIF_ID 0x38 303 #define CARL9170_TX_SUPER_MISC_VIF_ID_S 3 304 #define CARL9170_TX_SUPER_MISC_FILL_IN_TSF 0x40 305 #define CARL9170_TX_SUPER_MISC_CAB 0x80 306 307 #define CARL9170_TX_SUPER_RI_TRIES 0x7 308 #define CARL9170_TX_SUPER_RI_TRIES_S 0 309 #define CARL9170_TX_SUPER_RI_ERP_PROT 0x18 310 #define CARL9170_TX_SUPER_RI_ERP_PROT_S 3 311 #define CARL9170_TX_SUPER_RI_AMPDU 0x20 312 #define CARL9170_TX_SUPER_RI_AMPDU_S 5 313 314 struct _carl9170_tx_superdesc { 315 __le16 len; 316 u8 rix; 317 u8 cnt; 318 u8 cookie; 319 u8 ampdu_settings; 320 u8 misc; 321 u8 padding; 322 u8 ri[CARL9170_TX_MAX_RATES]; 323 __le32 rr[CARL9170_TX_MAX_RETRY_RATES]; 324 } __packed; 325 326 struct _carl9170_tx_superframe { 327 struct _carl9170_tx_superdesc s; 328 struct _ar9170_tx_hwdesc f; 329 u8 frame_data[0]; 330 } __packed; 331 332 #define CARL9170_TX_SUPERDESC_LEN 24 333 #define AR9170_TX_HWDESC_LEN 8 334 #define CARL9170_TX_SUPERFRAME_LEN (CARL9170_TX_SUPERDESC_LEN + \ 335 AR9170_TX_HWDESC_LEN) 336 337 struct ar9170_rx_head { 338 u8 plcp[12]; 339 } __packed; 340 341 #define AR9170_RX_HEAD_LEN 12 342 343 struct ar9170_rx_phystatus { 344 union { 345 struct { 346 u8 rssi_ant0, rssi_ant1, rssi_ant2, 347 rssi_ant0x, rssi_ant1x, rssi_ant2x, 348 rssi_combined; 349 } __packed; 350 u8 rssi[7]; 351 } __packed; 352 353 u8 evm_stream0[6], evm_stream1[6]; 354 u8 phy_err; 355 } __packed; 356 357 #define AR9170_RX_PHYSTATUS_LEN 20 358 359 struct ar9170_rx_macstatus { 360 u8 SAidx, DAidx; 361 u8 error; 362 u8 status; 363 } __packed; 364 365 #define AR9170_RX_MACSTATUS_LEN 4 366 367 struct ar9170_rx_frame_single { 368 struct ar9170_rx_head phy_head; 369 struct ieee80211_hdr i3e; 370 struct ar9170_rx_phystatus phy_tail; 371 struct ar9170_rx_macstatus macstatus; 372 } __packed; 373 374 struct ar9170_rx_frame_head { 375 struct ar9170_rx_head phy_head; 376 struct ieee80211_hdr i3e; 377 struct ar9170_rx_macstatus macstatus; 378 } __packed; 379 380 struct ar9170_rx_frame_middle { 381 struct ieee80211_hdr i3e; 382 struct ar9170_rx_macstatus macstatus; 383 } __packed; 384 385 struct ar9170_rx_frame_tail { 386 struct ieee80211_hdr i3e; 387 struct ar9170_rx_phystatus phy_tail; 388 struct ar9170_rx_macstatus macstatus; 389 } __packed; 390 391 struct ar9170_rx_frame { 392 union { 393 struct ar9170_rx_frame_single single; 394 struct ar9170_rx_frame_head head; 395 struct ar9170_rx_frame_middle middle; 396 struct ar9170_rx_frame_tail tail; 397 } __packed; 398 } __packed; 399 400 static inline u8 ar9170_get_decrypt_type(struct ar9170_rx_macstatus *t) 401 { 402 return (t->SAidx & 0xc0) >> 4 | 403 (t->DAidx & 0xc0) >> 6; 404 } 405 406 enum ar9170_txq { 407 AR9170_TXQ_BE, 408 409 AR9170_TXQ_VI, 410 AR9170_TXQ_VO, 411 AR9170_TXQ_BK, 412 413 __AR9170_NUM_TXQ, 414 }; 415 416 static const u8 ar9170_qmap[__AR9170_NUM_TXQ] = { 2, 1, 0, 3 }; 417 418 #define AR9170_TXQ_DEPTH 32 419 420 #endif /* __CARL9170_SHARED_WLAN_H */

1 /* 2 * Read-Copy Update mechanism for mutual exclusion 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 * 18 * Copyright IBM Corporation, 2001 19 * 20 * Author: Dipankar Sarma <dipankar@in.ibm.com> 21 * 22 * Based on the original work by Paul McKenney <paulmck@us.ibm.com> 23 * and inputs from Rusty Russell, Andrea Arcangeli and Andi Kleen. 24 * Papers: 25 * http://www.rdrop.com/users/paulmck/paper/rclockpdcsproof.pdf 26 * http://lse.sourceforge.net/locking/rclock_OLS.2001.05.01c.sc.pdf (OLS2001) 27 * 28 * For detailed explanation of Read-Copy Update mechanism see - 29 * http://lse.sourceforge.net/locking/rcupdate.html 30 * 31 */ 32 33 #ifndef __LINUX_RCUPDATE_H 34 #define __LINUX_RCUPDATE_H 35 36 #include <linux/cache.h> 37 #include <linux/spinlock.h> 38 #include <linux/threads.h> 39 #include <linux/cpumask.h> 40 #include <linux/seqlock.h> 41 #include <linux/lockdep.h> 42 #include <linux/completion.h> 43 #include <linux/debugobjects.h> 44 #include <linux/compiler.h> 45 46 #ifdef CONFIG_RCU_TORTURE_TEST 47 extern int rcutorture_runnable; /* for sysctl */ 48 #endif /* #ifdef CONFIG_RCU_TORTURE_TEST */ 49 50 #define ULONG_CMP_GE(a, b) (ULONG_MAX / 2 >= (a) - (b)) 51 #define ULONG_CMP_LT(a, b) (ULONG_MAX / 2 < (a) - (b)) 52 53 /** 54 * struct rcu_head - callback structure for use with RCU 55 * @next: next update requests in a list 56 * @func: actual update function to call after the grace period. 57 */ 58 struct rcu_head { 59 struct rcu_head *next; 60 void (*func)(struct rcu_head *head); 61 }; 62 63 /* Exported common interfaces */ 64 extern void call_rcu_sched(struct rcu_head *head, 65 void (*func)(struct rcu_head *rcu)); 66 extern void synchronize_sched(void); 67 extern void rcu_barrier_bh(void); 68 extern void rcu_barrier_sched(void); 69 extern void synchronize_sched_expedited(void); 70 extern int sched_expedited_torture_stats(char *page); 71 72 static inline void __rcu_read_lock_bh(void) 73 { 74 local_bh_disable(); 75 } 76 77 static inline void __rcu_read_unlock_bh(void) 78 { 79 local_bh_enable(); 80 } 81 82 #ifdef CONFIG_PREEMPT_RCU 83 84 extern void __rcu_read_lock(void); 85 extern void __rcu_read_unlock(void); 86 void synchronize_rcu(void); 87 88 /* 89 * Defined as a macro as it is a very low level header included from 90 * areas that don't even know about current. This gives the rcu_read_lock() 91 * nesting depth, but makes sense only if CONFIG_PREEMPT_RCU -- in other 92 * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. 93 */ 94 #define rcu_preempt_depth() (current->rcu_read_lock_nesting) 95 96 #else /* #ifdef CONFIG_PREEMPT_RCU */ 97 98 static inline void __rcu_read_lock(void) 99 { 100 preempt_disable(); 101 } 102 103 static inline void __rcu_read_unlock(void) 104 { 105 preempt_enable(); 106 } 107 108 static inline void synchronize_rcu(void) 109 { 110 synchronize_sched(); 111 } 112 113 static inline int rcu_preempt_depth(void) 114 { 115 return 0; 116 } 117 118 #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ 119 120 /* Internal to kernel */ 121 extern void rcu_init(void); 122 extern void rcu_sched_qs(int cpu); 123 extern void rcu_bh_qs(int cpu); 124 extern void rcu_check_callbacks(int cpu, int user); 125 struct notifier_block; 126 127 #ifdef CONFIG_NO_HZ 128 129 extern void rcu_enter_nohz(void); 130 extern void rcu_exit_nohz(void); 131 132 #else /* #ifdef CONFIG_NO_HZ */ 133 134 static inline void rcu_enter_nohz(void) 135 { 136 } 137 138 static inline void rcu_exit_nohz(void) 139 { 140 } 141 142 #endif /* #else #ifdef CONFIG_NO_HZ */ 143 144 #if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU) 145 #include <linux/rcutree.h> 146 #elif defined(CONFIG_TINY_RCU) || defined(CONFIG_TINY_PREEMPT_RCU) 147 #include <linux/rcutiny.h> 148 #else 149 #error "Unknown RCU implementation specified to kernel configuration" 150 #endif 151 152 /* 153 * init_rcu_head_on_stack()/destroy_rcu_head_on_stack() are needed for dynamic 154 * initialization and destruction of rcu_head on the stack. rcu_head structures 155 * allocated dynamically in the heap or defined statically don't need any 156 * initialization. 157 */ 158 #ifdef CONFIG_DEBUG_OBJECTS_RCU_HEAD 159 extern void init_rcu_head_on_stack(struct rcu_head *head); 160 extern void destroy_rcu_head_on_stack(struct rcu_head *head); 161 #else /* !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ 162 static inline void init_rcu_head_on_stack(struct rcu_head *head) 163 { 164 } 165 166 static inline void destroy_rcu_head_on_stack(struct rcu_head *head) 167 { 168 } 169 #endif /* #else !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ 170 171 #ifdef CONFIG_DEBUG_LOCK_ALLOC 172 173 extern struct lockdep_map rcu_lock_map; 174 # define rcu_read_acquire() \ 175 lock_acquire(&rcu_lock_map, 0, 0, 2, 1, NULL, _THIS_IP_) 176 # define rcu_read_release() lock_release(&rcu_lock_map, 1, _THIS_IP_) 177 178 extern struct lockdep_map rcu_bh_lock_map; 179 # define rcu_read_acquire_bh() \ 180 lock_acquire(&rcu_bh_lock_map, 0, 0, 2, 1, NULL, _THIS_IP_) 181 # define rcu_read_release_bh() lock_release(&rcu_bh_lock_map, 1, _THIS_IP_) 182 183 extern struct lockdep_map rcu_sched_lock_map; 184 # define rcu_read_acquire_sched() \ 185 lock_acquire(&rcu_sched_lock_map, 0, 0, 2, 1, NULL, _THIS_IP_) 186 # define rcu_read_release_sched() \ 187 lock_release(&rcu_sched_lock_map, 1, _THIS_IP_) 188 189 extern int debug_lockdep_rcu_enabled(void); 190 191 /** 192 * rcu_read_lock_held() - might we be in RCU read-side critical section? 193 * 194 * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an RCU 195 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC, 196 * this assumes we are in an RCU read-side critical section unless it can 197 * prove otherwise. This is useful for debug checks in functions that 198 * require that they be called within an RCU read-side critical section. 199 * 200 * Checks debug_lockdep_rcu_enabled() to prevent false positives during boot 201 * and while lockdep is disabled. 202 */ 203 static inline int rcu_read_lock_held(void) 204 { 205 if (!debug_lockdep_rcu_enabled()) 206 return 1; 207 return lock_is_held(&rcu_lock_map); 208 } 209 210 /* 211 * rcu_read_lock_bh_held() is defined out of line to avoid #include-file 212 * hell. 213 */ 214 extern int rcu_read_lock_bh_held(void); 215 216 /** 217 * rcu_read_lock_sched_held() - might we be in RCU-sched read-side critical section? 218 * 219 * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an 220 * RCU-sched read-side critical section. In absence of 221 * CONFIG_DEBUG_LOCK_ALLOC, this assumes we are in an RCU-sched read-side 222 * critical section unless it can prove otherwise. Note that disabling 223 * of preemption (including disabling irqs) counts as an RCU-sched 224 * read-side critical section. This is useful for debug checks in functions 225 * that required that they be called within an RCU-sched read-side 226 * critical section. 227 * 228 * Check debug_lockdep_rcu_enabled() to prevent false positives during boot 229 * and while lockdep is disabled. 230 */ 231 #ifdef CONFIG_PREEMPT 232 static inline int rcu_read_lock_sched_held(void) 233 { 234 int lockdep_opinion = 0; 235 236 if (!debug_lockdep_rcu_enabled()) 237 return 1; 238 if (debug_locks) 239 lockdep_opinion = lock_is_held(&rcu_sched_lock_map); 240 return lockdep_opinion || preempt_count() != 0 || irqs_disabled(); 241 } 242 #else /* #ifdef CONFIG_PREEMPT */ 243 static inline int rcu_read_lock_sched_held(void) 244 { 245 return 1; 246 } 247 #endif /* #else #ifdef CONFIG_PREEMPT */ 248 249 #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ 250 251 # define rcu_read_acquire() do { } while (0) 252 # define rcu_read_release() do { } while (0) 253 # define rcu_read_acquire_bh() do { } while (0) 254 # define rcu_read_release_bh() do { } while (0) 255 # define rcu_read_acquire_sched() do { } while (0) 256 # define rcu_read_release_sched() do { } while (0) 257 258 static inline int rcu_read_lock_held(void) 259 { 260 return 1; 261 } 262 263 static inline int rcu_read_lock_bh_held(void) 264 { 265 return 1; 266 } 267 268 #ifdef CONFIG_PREEMPT 269 static inline int rcu_read_lock_sched_held(void) 270 { 271 return preempt_count() != 0 || irqs_disabled(); 272 } 273 #else /* #ifdef CONFIG_PREEMPT */ 274 static inline int rcu_read_lock_sched_held(void) 275 { 276 return 1; 277 } 278 #endif /* #else #ifdef CONFIG_PREEMPT */ 279 280 #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ 281 282 #ifdef CONFIG_PROVE_RCU 283 284 extern int rcu_my_thread_group_empty(void); 285 286 /** 287 * rcu_lockdep_assert - emit lockdep splat if specified condition not met 288 * @c: condition to check 289 */ 290 #define rcu_lockdep_assert(c) \ 291 do { \ 292 static bool __warned; \ 293 if (debug_lockdep_rcu_enabled() && !__warned && !(c)) { \ 294 __warned = true; \ 295 lockdep_rcu_dereference(__FILE__, __LINE__); \ 296 } \ 297 } while (0) 298 299 #else /* #ifdef CONFIG_PROVE_RCU */ 300 301 #define rcu_lockdep_assert(c) do { } while (0) 302 303 #endif /* #else #ifdef CONFIG_PROVE_RCU */ 304 305 /* 306 * Helper functions for rcu_dereference_check(), rcu_dereference_protected() 307 * and rcu_assign_pointer(). Some of these could be folded into their 308 * callers, but they are left separate in order to ease introduction of 309 * multiple flavors of pointers to match the multiple flavors of RCU 310 * (e.g., __rcu_bh, * __rcu_sched, and __srcu), should this make sense in 311 * the future. 312 */ 313 314 #ifdef __CHECKER__ 315 #define rcu_dereference_sparse(p, space) \ 316 ((void)(((typeof(*p) space *)p) == p)) 317 #else /* #ifdef __CHECKER__ */ 318 #define rcu_dereference_sparse(p, space) 319 #endif /* #else #ifdef __CHECKER__ */ 320 321 #define __rcu_access_pointer(p, space) \ 322 ({ \ 323 typeof(*p) *_________p1 = (typeof(*p)*__force )ACCESS_ONCE(p); \ 324 rcu_dereference_sparse(p, space); \ 325 ((typeof(*p) __force __kernel *)(_________p1)); \ 326 }) 327 #define __rcu_dereference_check(p, c, space) \ 328 ({ \ 329 typeof(*p) *_________p1 = (typeof(*p)*__force )ACCESS_ONCE(p); \ 330 rcu_lockdep_assert(c); \ 331 rcu_dereference_sparse(p, space); \ 332 smp_read_barrier_depends(); \ 333 ((typeof(*p) __force __kernel *)(_________p1)); \ 334 }) 335 #define __rcu_dereference_protected(p, c, space) \ 336 ({ \ 337 rcu_lockdep_assert(c); \ 338 rcu_dereference_sparse(p, space); \ 339 ((typeof(*p) __force __kernel *)(p)); \ 340 }) 341 342 #define __rcu_dereference_index_check(p, c) \ 343 ({ \ 344 typeof(p) _________p1 = ACCESS_ONCE(p); \ 345 rcu_lockdep_assert(c); \ 346 smp_read_barrier_depends(); \ 347 (_________p1); \ 348 }) 349 #define __rcu_assign_pointer(p, v, space) \ 350 ({ \ 351 if (!__builtin_constant_p(v) || \ 352 ((v) != NULL)) \ 353 smp_wmb(); \ 354 (p) = (typeof(*v) __force space *)(v); \ 355 }) 356 357 358 /** 359 * rcu_access_pointer() - fetch RCU pointer with no dereferencing 360 * @p: The pointer to read 361 * 362 * Return the value of the specified RCU-protected pointer, but omit the 363 * smp_read_barrier_depends() and keep the ACCESS_ONCE(). This is useful 364 * when the value of this pointer is accessed, but the pointer is not 365 * dereferenced, for example, when testing an RCU-protected pointer against 366 * NULL. Although rcu_access_pointer() may also be used in cases where 367 * update-side locks prevent the value of the pointer from changing, you 368 * should instead use rcu_dereference_protected() for this use case. 369 */ 370 #define rcu_access_pointer(p) __rcu_access_pointer((p), __rcu) 371 372 /** 373 * rcu_dereference_check() - rcu_dereference with debug checking 374 * @p: The pointer to read, prior to dereferencing 375 * @c: The conditions under which the dereference will take place 376 * 377 * Do an rcu_dereference(), but check that the conditions under which the 378 * dereference will take place are correct. Typically the conditions 379 * indicate the various locking conditions that should be held at that 380 * point. The check should return true if the conditions are satisfied. 381 * An implicit check for being in an RCU read-side critical section 382 * (rcu_read_lock()) is included. 383 * 384 * For example: 385 * 386 * bar = rcu_dereference_check(foo->bar, lockdep_is_held(&foo->lock)); 387 * 388 * could be used to indicate to lockdep that foo->bar may only be dereferenced 389 * if either rcu_read_lock() is held, or that the lock required to replace 390 * the bar struct at foo->bar is held. 391 * 392 * Note that the list of conditions may also include indications of when a lock 393 * need not be held, for example during initialisation or destruction of the 394 * target struct: 395 * 396 * bar = rcu_dereference_check(foo->bar, lockdep_is_held(&foo->lock) || 397 * atomic_read(&foo->usage) == 0); 398 * 399 * Inserts memory barriers on architectures that require them 400 * (currently only the Alpha), prevents the compiler from refetching 401 * (and from merging fetches), and, more importantly, documents exactly 402 * which pointers are protected by RCU and checks that the pointer is 403 * annotated as __rcu. 404 */ 405 #define rcu_dereference_check(p, c) \ 406 __rcu_dereference_check((p), rcu_read_lock_held() || (c), __rcu) 407 408 /** 409 * rcu_dereference_bh_check() - rcu_dereference_bh with debug checking 410 * @p: The pointer to read, prior to dereferencing 411 * @c: The conditions under which the dereference will take place 412 * 413 * This is the RCU-bh counterpart to rcu_dereference_check(). 414 */ 415 #define rcu_dereference_bh_check(p, c) \ 416 __rcu_dereference_check((p), rcu_read_lock_bh_held() || (c), __rcu) 417 418 /** 419 * rcu_dereference_sched_check() - rcu_dereference_sched with debug checking 420 * @p: The pointer to read, prior to dereferencing 421 * @c: The conditions under which the dereference will take place 422 * 423 * This is the RCU-sched counterpart to rcu_dereference_check(). 424 */ 425 #define rcu_dereference_sched_check(p, c) \ 426 __rcu_dereference_check((p), rcu_read_lock_sched_held() || (c), \ 427 __rcu) 428 429 #define rcu_dereference_raw(p) rcu_dereference_check(p, 1) /*@@@ needed? @@@*/ 430 431 /** 432 * rcu_dereference_index_check() - rcu_dereference for indices with debug checking 433 * @p: The pointer to read, prior to dereferencing 434 * @c: The conditions under which the dereference will take place 435 * 436 * Similar to rcu_dereference_check(), but omits the sparse checking. 437 * This allows rcu_dereference_index_check() to be used on integers, 438 * which can then be used as array indices. Attempting to use 439 * rcu_dereference_check() on an integer will give compiler warnings 440 * because the sparse address-space mechanism relies on dereferencing 441 * the RCU-protected pointer. Dereferencing integers is not something 442 * that even gcc will put up with. 443 * 444 * Note that this function does not implicitly check for RCU read-side 445 * critical sections. If this function gains lots of uses, it might 446 * make sense to provide versions for each flavor of RCU, but it does 447 * not make sense as of early 2010. 448 */ 449 #define rcu_dereference_index_check(p, c) \ 450 __rcu_dereference_index_check((p), (c)) 451 452 /** 453 * rcu_dereference_protected() - fetch RCU pointer when updates prevented 454 * @p: The pointer to read, prior to dereferencing 455 * @c: The conditions under which the dereference will take place 456 * 457 * Return the value of the specified RCU-protected pointer, but omit 458 * both the smp_read_barrier_depends() and the ACCESS_ONCE(). This 459 * is useful in cases where update-side locks prevent the value of the 460 * pointer from changing. Please note that this primitive does -not- 461 * prevent the compiler from repeating this reference or combining it 462 * with other references, so it should not be used without protection 463 * of appropriate locks. 464 * 465 * This function is only for update-side use. Using this function 466 * when protected only by rcu_read_lock() will result in infrequent 467 * but very ugly failures. 468 */ 469 #define rcu_dereference_protected(p, c) \ 470 __rcu_dereference_protected((p), (c), __rcu) 471 472 /** 473 * rcu_dereference_bh_protected() - fetch RCU-bh pointer when updates prevented 474 * @p: The pointer to read, prior to dereferencing 475 * @c: The conditions under which the dereference will take place 476 * 477 * This is the RCU-bh counterpart to rcu_dereference_protected(). 478 */ 479 #define rcu_dereference_bh_protected(p, c) \ 480 __rcu_dereference_protected((p), (c), __rcu) 481 482 /** 483 * rcu_dereference_sched_protected() - fetch RCU-sched pointer when updates prevented 484 * @p: The pointer to read, prior to dereferencing 485 * @c: The conditions under which the dereference will take place 486 * 487 * This is the RCU-sched counterpart to rcu_dereference_protected(). 488 */ 489 #define rcu_dereference_sched_protected(p, c) \ 490 __rcu_dereference_protected((p), (c), __rcu) 491 492 493 /** 494 * rcu_dereference() - fetch RCU-protected pointer for dereferencing 495 * @p: The pointer to read, prior to dereferencing 496 * 497 * This is a simple wrapper around rcu_dereference_check(). 498 */ 499 #define rcu_dereference(p) rcu_dereference_check(p, 0) 500 501 /** 502 * rcu_dereference_bh() - fetch an RCU-bh-protected pointer for dereferencing 503 * @p: The pointer to read, prior to dereferencing 504 * 505 * Makes rcu_dereference_check() do the dirty work. 506 */ 507 #define rcu_dereference_bh(p) rcu_dereference_bh_check(p, 0) 508 509 /** 510 * rcu_dereference_sched() - fetch RCU-sched-protected pointer for dereferencing 511 * @p: The pointer to read, prior to dereferencing 512 * 513 * Makes rcu_dereference_check() do the dirty work. 514 */ 515 #define rcu_dereference_sched(p) rcu_dereference_sched_check(p, 0) 516 517 /** 518 * rcu_read_lock() - mark the beginning of an RCU read-side critical section 519 * 520 * When synchronize_rcu() is invoked on one CPU while other CPUs 521 * are within RCU read-side critical sections, then the 522 * synchronize_rcu() is guaranteed to block until after all the other 523 * CPUs exit their critical sections. Similarly, if call_rcu() is invoked 524 * on one CPU while other CPUs are within RCU read-side critical 525 * sections, invocation of the corresponding RCU callback is deferred 526 * until after the all the other CPUs exit their critical sections. 527 * 528 * Note, however, that RCU callbacks are permitted to run concurrently 529 * with new RCU read-side critical sections. One way that this can happen 530 * is via the following sequence of events: (1) CPU 0 enters an RCU 531 * read-side critical section, (2) CPU 1 invokes call_rcu() to register 532 * an RCU callback, (3) CPU 0 exits the RCU read-side critical section, 533 * (4) CPU 2 enters a RCU read-side critical section, (5) the RCU 534 * callback is invoked. This is legal, because the RCU read-side critical 535 * section that was running concurrently with the call_rcu() (and which 536 * therefore might be referencing something that the corresponding RCU 537 * callback would free up) has completed before the corresponding 538 * RCU callback is invoked. 539 * 540 * RCU read-side critical sections may be nested. Any deferred actions 541 * will be deferred until the outermost RCU read-side critical section 542 * completes. 543 * 544 * You can avoid reading and understanding the next paragraph by 545 * following this rule: don't put anything in an rcu_read_lock() RCU 546 * read-side critical section that would block in a !PREEMPT kernel. 547 * But if you want the full story, read on! 548 * 549 * In non-preemptible RCU implementations (TREE_RCU and TINY_RCU), it 550 * is illegal to block while in an RCU read-side critical section. In 551 * preemptible RCU implementations (TREE_PREEMPT_RCU and TINY_PREEMPT_RCU) 552 * in CONFIG_PREEMPT kernel builds, RCU read-side critical sections may 553 * be preempted, but explicit blocking is illegal. Finally, in preemptible 554 * RCU implementations in real-time (CONFIG_PREEMPT_RT) kernel builds, 555 * RCU read-side critical sections may be preempted and they may also 556 * block, but only when acquiring spinlocks that are subject to priority 557 * inheritance. 558 */ 559 static inline void rcu_read_lock(void) 560 { 561 __rcu_read_lock(); 562 __acquire(RCU); 563 rcu_read_acquire(); 564 } 565 566 /* 567 * So where is rcu_write_lock()? It does not exist, as there is no 568 * way for writers to lock out RCU readers. This is a feature, not 569 * a bug -- this property is what provides RCU's performance benefits. 570 * Of course, writers must coordinate with each other. The normal 571 * spinlock primitives work well for this, but any other technique may be 572 * used as well. RCU does not care how the writers keep out of each 573 * others' way, as long as they do so. 574 */ 575 576 /** 577 * rcu_read_unlock() - marks the end of an RCU read-side critical section. 578 * 579 * See rcu_read_lock() for more information. 580 */ 581 static inline void rcu_read_unlock(void) 582 { 583 rcu_read_release(); 584 __release(RCU); 585 __rcu_read_unlock(); 586 } 587 588 /** 589 * rcu_read_lock_bh() - mark the beginning of an RCU-bh critical section 590 * 591 * This is equivalent of rcu_read_lock(), but to be used when updates 592 * are being done using call_rcu_bh() or synchronize_rcu_bh(). Since 593 * both call_rcu_bh() and synchronize_rcu_bh() consider completion of a 594 * softirq handler to be a quiescent state, a process in RCU read-side 595 * critical section must be protected by disabling softirqs. Read-side 596 * critical sections in interrupt context can use just rcu_read_lock(), 597 * though this should at least be commented to avoid confusing people 598 * reading the code. 599 */ 600 static inline void rcu_read_lock_bh(void) 601 { 602 __rcu_read_lock_bh(); 603 __acquire(RCU_BH); 604 rcu_read_acquire_bh(); 605 } 606 607 /* 608 * rcu_read_unlock_bh - marks the end of a softirq-only RCU critical section 609 * 610 * See rcu_read_lock_bh() for more information. 611 */ 612 static inline void rcu_read_unlock_bh(void) 613 { 614 rcu_read_release_bh(); 615 __release(RCU_BH); 616 __rcu_read_unlock_bh(); 617 } 618 619 /** 620 * rcu_read_lock_sched() - mark the beginning of a RCU-sched critical section 621 * 622 * This is equivalent of rcu_read_lock(), but to be used when updates 623 * are being done using call_rcu_sched() or synchronize_rcu_sched(). 624 * Read-side critical sections can also be introduced by anything that 625 * disables preemption, including local_irq_disable() and friends. 626 */ 627 static inline void rcu_read_lock_sched(void) 628 { 629 preempt_disable(); 630 __acquire(RCU_SCHED); 631 rcu_read_acquire_sched(); 632 } 633 634 /* Used by lockdep and tracing: cannot be traced, cannot call lockdep. */ 635 static inline notrace void rcu_read_lock_sched_notrace(void) 636 { 637 preempt_disable_notrace(); 638 __acquire(RCU_SCHED); 639 } 640 641 /* 642 * rcu_read_unlock_sched - marks the end of a RCU-classic critical section 643 * 644 * See rcu_read_lock_sched for more information. 645 */ 646 static inline void rcu_read_unlock_sched(void) 647 { 648 rcu_read_release_sched(); 649 __release(RCU_SCHED); 650 preempt_enable(); 651 } 652 653 /* Used by lockdep and tracing: cannot be traced, cannot call lockdep. */ 654 static inline notrace void rcu_read_unlock_sched_notrace(void) 655 { 656 __release(RCU_SCHED); 657 preempt_enable_notrace(); 658 } 659 660 /** 661 * rcu_assign_pointer() - assign to RCU-protected pointer 662 * @p: pointer to assign to 663 * @v: value to assign (publish) 664 * 665 * Assigns the specified value to the specified RCU-protected 666 * pointer, ensuring that any concurrent RCU readers will see 667 * any prior initialization. Returns the value assigned. 668 * 669 * Inserts memory barriers on architectures that require them 670 * (pretty much all of them other than x86), and also prevents 671 * the compiler from reordering the code that initializes the 672 * structure after the pointer assignment. More importantly, this 673 * call documents which pointers will be dereferenced by RCU read-side 674 * code. 675 */ 676 #define rcu_assign_pointer(p, v) \ 677 __rcu_assign_pointer((p), (v), __rcu) 678 679 /** 680 * RCU_INIT_POINTER() - initialize an RCU protected pointer 681 * 682 * Initialize an RCU-protected pointer in such a way to avoid RCU-lockdep 683 * splats. 684 */ 685 #define RCU_INIT_POINTER(p, v) \ 686 p = (typeof(*v) __force __rcu *)(v) 687 688 /* Infrastructure to implement the synchronize_() primitives. */ 689 690 struct rcu_synchronize { 691 struct rcu_head head; 692 struct completion completion; 693 }; 694 695 extern void wakeme_after_rcu(struct rcu_head *head); 696 697 #ifdef CONFIG_PREEMPT_RCU 698 699 /** 700 * call_rcu() - Queue an RCU callback for invocation after a grace period. 701 * @head: structure to be used for queueing the RCU updates. 702 * @func: actual callback function to be invoked after the grace period 703 * 704 * The callback function will be invoked some time after a full grace 705 * period elapses, in other words after all pre-existing RCU read-side 706 * critical sections have completed. However, the callback function 707 * might well execute concurrently with RCU read-side critical sections 708 * that started after call_rcu() was invoked. RCU read-side critical 709 * sections are delimited by rcu_read_lock() and rcu_read_unlock(), 710 * and may be nested. 711 */ 712 extern void call_rcu(struct rcu_head *head, 713 void (*func)(struct rcu_head *head)); 714 715 #else /* #ifdef CONFIG_PREEMPT_RCU */ 716 717 /* In classic RCU, call_rcu() is just call_rcu_sched(). */ 718 #define call_rcu call_rcu_sched 719 720 #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ 721 722 /** 723 * call_rcu_bh() - Queue an RCU for invocation after a quicker grace period. 724 * @head: structure to be used for queueing the RCU updates. 725 * @func: actual callback function to be invoked after the grace period 726 * 727 * The callback function will be invoked some time after a full grace 728 * period elapses, in other words after all currently executing RCU 729 * read-side critical sections have completed. call_rcu_bh() assumes 730 * that the read-side critical sections end on completion of a softirq 731 * handler. This means that read-side critical sections in process 732 * context must not be interrupted by softirqs. This interface is to be 733 * used when most of the read-side critical sections are in softirq context. 734 * RCU read-side critical sections are delimited by : 735 * - rcu_read_lock() and rcu_read_unlock(), if in interrupt context. 736 * OR 737 * - rcu_read_lock_bh() and rcu_read_unlock_bh(), if in process context. 738 * These may be nested. 739 */ 740 extern void call_rcu_bh(struct rcu_head *head, 741 void (*func)(struct rcu_head *head)); 742 743 /* 744 * debug_rcu_head_queue()/debug_rcu_head_unqueue() are used internally 745 * by call_rcu() and rcu callback execution, and are therefore not part of the 746 * RCU API. Leaving in rcupdate.h because they are used by all RCU flavors. 747 */ 748 749 #ifdef CONFIG_DEBUG_OBJECTS_RCU_HEAD 750 # define STATE_RCU_HEAD_READY 0 751 # define STATE_RCU_HEAD_QUEUED 1 752 753 extern struct debug_obj_descr rcuhead_debug_descr; 754 755 static inline void debug_rcu_head_queue(struct rcu_head *head) 756 { 757 debug_object_activate(head, &rcuhead_debug_descr); 758 debug_object_active_state(head, &rcuhead_debug_descr, 759 STATE_RCU_HEAD_READY, 760 STATE_RCU_HEAD_QUEUED); 761 } 762 763 static inline void debug_rcu_head_unqueue(struct rcu_head *head) 764 { 765 debug_object_active_state(head, &rcuhead_debug_descr, 766 STATE_RCU_HEAD_QUEUED, 767 STATE_RCU_HEAD_READY); 768 debug_object_deactivate(head, &rcuhead_debug_descr); 769 } 770 #else /* !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ 771 static inline void debug_rcu_head_queue(struct rcu_head *head) 772 { 773 } 774 775 static inline void debug_rcu_head_unqueue(struct rcu_head *head) 776 { 777 } 778 #endif /* #else !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ 779 780 #endif /* __LINUX_RCUPDATE_H */

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